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PDF BD71801GWL Data sheet ( Hoja de datos )
| Número de pieza | BD71801GWL | |
| Descripción | Power Management LSI | |
| Fabricantes | ROHM Semiconductor | |
| Logotipo |  |
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Datasheet
Power Management LSI
for Mobile Phone
BD71801GWL
General Description
The BD71801GWL is an integrated Power Management
LSI available in a small 80-pins 0.4mm-pitch 3.8mm-by-
3.8mm Wafer-level CSP package, which is designed to
meet demands for space-constrained Smart phones.
The device provides 5-Buck Converters.
The device also includes 12 general-purpose LDOs
providing a wide range of voltage and current
capabilities.
All Buck Converters and LDOs are fully controllable by
the I2C interface. The BD71801GWL is very easy to use
in any mobile platforms.
Features
5-Channel High Efficiency Step-down Converters.
(Adjustable Voltage Options by I2C)
(Switching frequency 2MHz(TYP))
All Buck Converters Support PFM/PWM Auto Mode.
12-Channel LDOs are Programmable to Voltage
Options by I2C.
LDOs and all Buck Converters Power ON/OFF
Control Enabled by I2C Interface or External pin.
2ch NMOS output LDOs (LDO11, 12) for Optimized
Efficiency.
Power ON/OFF Sequence.
Support TCXO Buffer (26MHz) and 32KHz crystal
oscillator.
I2C Compatible Interface.
( I2C Clock Support : Full Speed Mode 400kHz)
(Device Address is “1001011”,”1001100”)
Applications
Smart Phones
Tablets
Mobile Router
Data Transmitter
Key Specifications
Input Voltage Range:
Output Voltage Range:
Switching Frequency:
OFF Current:
Operating Temperature Range:
2.6V to 5.5V
1.0V to 3.4V
2.0MHz(Typ)
0.3μA (Typ)
-35℃ to +85℃
Package
UCSP50L3C
W(Typ) x D(Typ) x H(Max)
3.80mm x 3.80mm x 0.57mm
○Product structure：Silicon monolithic integrated circuit
.www.rohm.com
© 2013 ROHM Co., Ltd. All rights reserved.
TSZ22111・14・001
○This product is not designed protection against radioactive rays
1/75
TSZ02201-0B1B0AB00010-1-2
18.Nov.2013 Rev.002
1 page  
BD71801GWL
Datasheet
Pin Descriptions
Ball No.
A1
A2
A3
A4
A5
A6
A7
A8
A9
B1
B2
B3
B4
B5
B6
B7
B8
B9
C1
C2
C3
C4
C5
Pin
Name
TEST1
LX4
PGND4
LX3
PGND3
LX2
PGND2
PBAT1
TEST2
LX5
LX5
PBAT4
PBAT3
FB3
PBAT2
FB2
FB1
PGND1
PGND5
PGND5
FB5
FB4
PSET
C6 ADRS
C7 SDA
C8 SCL
C9 LX1
Equivalent
A/D I/O
Circuit
Eiqure
--
-
AO
A
--
-
AO
A
--
-
AO
A
--
-
--
-
--
-
AO
A
AO
A
--
-
--
-
A I/O
B
--
-
A I/O
B
A I/O
B
--
-
--
-
--
-
A I/O
B
A I/O
B
DI
C
DI
C
Function
Non connect pin
(Open or connected to GND.)
Inductor Connection for SWREG4
Ground for SWREG4
Inductor Connection for SWREG3
Ground for SWREG3
Inductor Connection for SWREG2
Ground for SWREG2
Power Supply for SWREG1
Non connect pin
(Open or connected to GND)
Inductor Connection for SWREG5
Inductor Connection for SWREG5
Power Supply for SWREG4
Power Supply for SWREG3
Voltage Feed back pin for SWREG3
Power Supply for SWREG2
Voltage Feed back pin for SWREG2
Voltage Feed back pin for SWREG1
Ground for SWREG1
Ground for SWREG5
Ground for SWREG5
Voltage Feed back pin for SWREG5
Voltage Feed back pin for SWREG4
LDO1 Initial voltage set pin
(L=1.8V, H=2.6V)
Logic Selector
DI
DI
AO
D
E
A
I2C data input
I2C clock input
Inductor Connection for SWREG1
Diode
+ side
- side
VBAT
GND
Initial
Condition
-
Function
(Note1)
PBAT4
PGND4
HiZ
PBAT4
GND
-
PBAT3
PGND3
HiZ
PBAT3
GND
-
PBAT2
PGND
HiZ
PBAT2
GND
-
-
VBAT
PGND1
GND
-
-
(Note1)
PBAT5
PGND5
HiZ
PBAT5
PGND5
HiZ
- PGND4 -
- PGND3 -
PBAT3
GND
-
- PGND2 -
PBAT2
GND
-
PBAT1
GND
-
PBAT1
GND
-
PBAT5
GND
-
PBAT5
GND
-
PBAT5
GND
-
PBAT4
GND
-
PBAT3
PBAT4
VBAT
GND
GND
GND
- Connect to GND
I2C Address
- 1001011 (ADRS=L)
1001100 (ADRS=H)
-
VBAT
GND
-
PBAT1
PGND1
HiZ
(Note 1) The TEST1, 2, 3, 4, 5, 6 pin are used for factory test mode. Please keep these pin “OPEN” or GND at all times.
○Product structure：Silicon monolithic integrated circuit
.www.rohm.com
© 2013 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
○This product is not designed protection against radioactive rays
5/75
TSZ02201-0B1B0AB00010-1-2
18.Nov.2013 Rev.002
5 Page 
BD71801GWL
Datasheet
Initial Output Voltage Summary
Usage example
SWREG1
CORE
SWREG2
MEMORY
SWREG3
ANALOG
SWREG4
For VIN2 power supply
(efficiency improvement)
SWREG5
For VIN1 power supply
(efficiency improvement)
LDO1
I/O
LDO2
USB
LDO3
SIM I/F
LDO4
Reserved
LDO5
SYS PLL
LDO6
Reserved
LDO7
TCXO
LDO8
2.5V R/F
LDO9
LNA
LDO10
HKADC
LDO11
RX PLL
LDO12
TX PLL
(Note1) Depend on PSET pin setting.
Power
Supply
PBAT1
PBAT2
PBAT3
PBAT4
PBAT5
VIN1
VBAT
VBAT
VIN1
VIN1
VIN1
VIN1
VIN1
VIN1
VIN1
VIN2
VIN2
Initial Output Voltage
1.10V
1.80V
1.20V
1.40V
3.20V
2.60V / 1.80V (Note1)
3.30V
1.80V
2.80V
1.20V
2.80V
2.80V
2.50V
2.80V
2.80V
1.20V
1.20V
Load max
1.0A
0.5A
1.0A
0.5A
Adjustable range
±50,100mV
±50,100mV
±50,100mV
±50,100mV
1.4A
300mA
50mA
50mA
300mA
150mA
150mA
50mA
150mA
150mA
150mA
150mA
150mA
±50,100mV
±50,100mV
±50,100mV
±50,100mV
±50,100mV
±50,100mV
±50,100mV
±50,100mV
±50,100mV
±50,100mV
±50,100mV
±50,100mV
±50,100mV
SWREG Output Voltage Step Table
Voltage step
[V]
SWREG1
1.00
1.05
1.10
1.15
1.20
1.25
1.30
1.35
1.40
1.45
1.50
1.70
1.75
1.80
1.85
1.90
SWREG2
1.00
1.05
1.10
1.15
1.20
1.25
1.30
1.35
1.40
1.45
1.50
1.70
1.75
1.80
1.85
1.90
SWREG3
1.00
1.05
1.10
1.15
1.20
1.25
1.30
1.35
1.40
1.45
1.50
1.70
1.75
1.80
1.85
1.90
SWREG4
1.00
1.05
1.10
1.15
1.20
1.25
1.30
1.35
1.40
1.45
1.50
1.70
1.75
1.80
1.85
1.90
SWREG5
1.20
1.40
1.70
1.75
1.80
1.85
1.90
3.00
3.05
3.10
3.15
3.20
3.25
3.30
3.35
3.40
Voltage
step
[V]
LDO1
1.70
1.75
1.80
1.85
1.90
2.50
2.55
2.60
2.65
2.70
2.80
2.90
2.95
3.00
3.05
3.10
LDO2
2.55
2.60
2.65
2.75
2.80
2.85
2.90
2.95
3.00
3.05
3.10
3.20
3.25
3.30
3.35
3.40
LDO3
1.70
1.75
1.80
1.85
1.90
2.50
2.60
2.70
2.80
2.90
2.95
3.00
3.05
3.10
3.20
3.30
LDO4
1.10
1.20
1.30
1.70
1.80
1.90
2.50
2.55
2.60
2.65
2.70
2.75
2.80
2.85
2.90
3.00
LDO5
1.00
1.05
1.10
1.15
1.20
1.25
1.30
1.70
1.80
1.90
2.60
2.70
2.80
2.90
3.00
3.10
LDO6
1.10
1.20
1.30
1.70
1.80
1.90
2.50
2.55
2.60
2.65
2.70
2.75
2.80
2.85
2.90
3.00
LDO7
1.10
1.20
1.30
1.70
1.80
1.90
2.50
2.55
2.60
2.65
2.70
2.75
2.80
2.85
2.90
3.00
LDO8
1.20
1.30
1.70
1.80
2.40
2.45
2.50
2.55
2.60
2.65
2.70
2.75
2.80
2.85
2.90
3.00
LDO9
1.10
1.20
1.30
1.70
1.80
1.90
2.50
2.55
2.60
2.65
2.70
2.75
2.80
2.85
2.90
3.00
LDO10
1.10
1.20
1.30
1.70
1.80
1.90
2.50
2.55
2.60
2.65
2.70
2.75
2.80
2.85
2.90
3.00
LDO11
1.00
1.05
1.10
1.15
1.20
1.25
1.30
1.35
LDO12
1.00
1.05
1.10
1.15
1.20
1.25
1.30
1.35
○Product structure：Silicon monolithic integrated circuit
.www.rohm.com
© 2013 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
○This product is not designed protection against radioactive rays
11/75
TSZ02201-0B1B0AB00010-1-2
18.Nov.2013 Rev.002
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet BD71801GWL.PDF ] | |
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