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Número de pieza | BD50FA1MG-M | |
Descripción | LDO Regulator | |
Fabricantes | ROHM Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de BD50FA1MG-M (archivo pdf) en la parte inferior de esta página. Total 23 Páginas | ||
No Preview Available ! 100mA Fixed Output for Automotive
LDO Regulator
BDxxFA1MG-M
● General Description
BDxxFA1MG-M is an LDO regulator with output current capability of 0.1A and output voltage of 5.0V. The SSOP5 package
can contribute to the downsizing of the set. As protective function to prevent IC from destruction, this chip has built-in over
current protection circuit to protect the device when output is shorted and built-in thermal shutdown circuit to protect the IC
during thermal over load conditions. This regulator can use ceramic capacitor, which have smaller size and longer life than
other capacitors.
● Features
AEC-Q100 Qualified (Note1)
Built-in high accuracy reference voltage circuit
Built-in Over current protection circuit (OCP)
Built-in Temperature protection circuit (TSD)
Zero µA shutdown mode
Soft start function
(Note1 Grade2)
● Key Features
Input power supply voltage range:
Output voltage:
Output current:
Shutdown current:
Operating temperature range:
Vo+3.0V to 25.0V
5.0V
0.1A (Max)
0μA (Typ)
-40°C to +105°C
●Package
SSOP5
W(Typ.) D(Typ.) H(Max.)
2.90mm x2.80mm x 1.25mm
●Typical Application Circuit
VCC
CIN
VO
EN
GND
COUT
CIN, COUT : Ceramic Capacitor
●Ordering Information
BD x x F A 1
MG
-
MTR
Part Output
Number voltage
50:5.0V
Input
Voltage
F:30V
Output Current “M”
A1:0.1A
Series
Package
G:SSOP5
Product Rank
M:for Automotive
Packaging Specification
TR: Embossed tape and reel
○ Product structure : Silicon monolithic integrated circuit
www.rohm.com
© 2016 ROHM Co., Ltd. All rights reserved.
TSZ22111・14・001
○This product is not designed to have protection against radioactive rays.
1/19
TSZ02201-0GEG0A600050-1-2
3.Feb.2016 Rev.002
1 page BDxxFA1MG-M
●Performance Curve (Reference Data)
■BD50FA1MG-M
(Unless otherwise specified, Ta=25°C, Vcc=10V, EN=3V, CIN=COUT=2.2μF)
Datasheet
VEN
2V/div
Vcc
5V/div
Vo
5V/div
VEN
2V/div
Vcc
5V/div
40μs/div
Figure 2. Input sequence (25°C)
(COUT = 1μF)
Vo
5V/div
40μs /div
Figure 3. Input sequence (-40°C)
(COUT = 1μF)
VEN
2V/div
Vcc
5V/div
Vo
5V/div
VCC
10V/div
VEN
2V/div
40μs /div
Figure 4. Input sequence (105°C)
(COUT = 1μF)
Vo
5V/div
40μs /div
Figure 5. Input sequence (25°C)
(COUT = 1μF)
www.rohm.com
© 2016 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
5/19
TSZ02201-0GEG0A600050-1-2
3.Feb.2016 Rev.002
5 Page BDxxFA1MG-M
●Power Dissipation
■SSOP5
1.0
0.8
0.6Pd[W]
:
②0.67 W
0.4許容損失
0.2
①0.33 W
0.0
0
25 50 75 100 125 150
Ta [ƒC]
Figure 25 SSOP5 Power Dissipation Data(reference)
Datasheet
IC mounted on ROHM standard board based on JEDEC.
Board material: FR4
Board size:
1s 114.3 mm x 76.2 mm x 1.57 mmt
2s2p 114.3 mm x 76.2 mm x 1.6 mmt
Mount condition: PCB and exposed pad are soldered.
Top copper foil: The footprint ROHM recommend.
+ wiring to measure.
①: 1-layer PCB (Copper foil area on the reverse side of PCB: 0 mm x 0
mm)
②: 4-layer PCB (2 inner layers and copper foil area on the reverse side of
PCB: 74.2mm x 74.2 mm)
Condition①: θJA = 376.5 °C/W, ΨJT=40 °C/W
Condition②: θJA = 185.4 °C/W, ΨJT=30 °C/W
●Thermal Design
Within this IC, the power consumption is decided by the dropout voltage condition, the load current and the circuit current.
Refer to power dissipation curves illustrated in Figure 25 when using the IC in an environment of Ta ≥ 25 °C. Even if the
ambient temperature Ta is at 25 °C, depending on the input voltage and the load current, chip junction temperature can be
very high. Consider the design to be Tj ≤ Tjmax = 150 °C in all possible operating temperature range.
Should by any condition the maximum junction temperature Tjmax = 150 °C rating be exceeded by the temperature
increase of the chip, it may result in deterioration of the properties of the chip. The thermal impedance in this specification is
based on recommended PCB and measurement condition by JEDEC standard. Verify the application and allow sufficient
margins in the thermal design by the following method is used to calculate the junction temperature Tj.
Tj can be calculated by either of the two following methods.
1. The following method is used to calculate the junction temperature Tj.
Tj Ta PC θJA
Where:
Tj
Ta
PC
θJA
: Junction Temperature
: Ambient Temperature
: Power Consumption
: Thermal Impedance
(Junction to Ambient)
2. The following method is also used to calculate the junction temperature Tj.
Tj TT PC ΨJT
Where:
Tj
TT
PC
ΨJT
: Junction Temperature
: Top Center of Case’s (mold) Temperature
: Power consumption
: Thermal Impedance
(Junction to Top Center of Case)
www.rohm.com
© 2016 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
11/19
TSZ02201-0GEG0A600050-1-2
3.Feb.2016 Rev.002
11 Page |
Páginas | Total 23 Páginas | |
PDF Descargar | [ Datasheet BD50FA1MG-M.PDF ] |
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