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PDF MC74HC4060 Data sheet ( Hoja de datos )
| Número de pieza | MC74HC4060 | |
| Descripción | 14-Stage Binary Ripple Counter | |
| Fabricantes | Motorola Semiconductors | |
| Logotipo |  |
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
14-Stage Binary Ripple
Counter with Oscillator
High–Performance Silicon–Gate CMOS
The MC54/74HC4060 is identical in pinout to the standard CMOS
MC14060B. The device inputs are compatible with standard CMOS outputs;
with pullup resistors, they are compatible with LSTTL outputs.
This device consists of 14 master–slave flip–flops and an oscillator with a
frequency that is controlled either by a crystal or by an RC circuit connected
externally. The output of each flip–flop feeds the next, and the frequency at
each output is half that of the preceding one. The state of the counter
advances on the negative–going edge of Osc In. The active–high Reset is
asynchronous and disables the oscillator to allow very low power consump-
tion during standby operation.
State changes of the Q outputs do not occur simultaneously because of
internal ripple delays. Therefore, decoded output signals are subject to
decoding spikes and may need to be gated with Osc Out 2 of the HC4060.
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2 to 6 V
• Low Input Current: 1 µA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 390 FETs or 97.5 Equivalent Gates
LOGIC DIAGRAM
OSC OUT 1 OSC OUT 2
10 9
OSC IN 11
7 Q4
5 Q5
4 Q6
6 Q7
14 Q8
13 Q9
15 Q10
1 Q12
2 Q13
3 Q14
RESET 12
PIN 16 = VCC
PIN 8 = GND
MC54/74HC4060
16
1
J SUFFIX
CERAMIC PACKAGE
CASE 620–10
16
1
N SUFFIX
PLASTIC PACKAGE
CASE 648–08
16
1
DT SUFFIX
TSSOP PACKAGE
CASE 948F–01
ORDERING INFORMATION
MC54HCXXXXJ
MC74HCXXXXN
MC74HCXXXXDT
Ceramic
Plastic
TSSOP
PIN ASSIGNMENT
Q12 1
Q13 2
Q14 3
Q6 4
Q5 5
Q7 6
Q4 7
GND 8
16 VCC
15 Q10
14 Q8
13 Q9
12 RESET
11 OSC IN
10 OSC OUT 1
9 OSC OUT 2
Clock
X
FUNCTION TABLE
Reset
L
L
H
Output State
No Change
Advance to Next State
All Outputs are Low
10/95
© Motorola, Inc. 1995
1 REV 6
1 page  
EXPANDED LOGIC DIAGRAM
Q4 Q5
75
Q12
1
MC54/74HC4060
Q13 Q14
23
OSC OUT 2 9
OSC OUT 1 10
OSC IN 11
RESET 12
CQ
CQ
R
CQ
CQ
R
Q6 = PIN 4
Q7 = PIN 6
Q8 = PIN 14
Q9 = PIN 13
CQ
CQ
R
CQ
CQ
R
Q10 = PIN 15
VCC = PIN 16
GND = PIN 8
CQ
CQ
R
CQ
C
R
RESET 12
OSC IN 11
OSC OUT 1 10
Rtc
RS
OSC OUT 2 9
Ctc
For 2.0 V ≤ VCC ≤ 6.0 V
10 Rtc > RS > 2 Rtc
400 Hz ≤ f ≤ 400 kHz
f≈
1
3 RtcCtc
(f in Hz, Rtc in ohms, Ctc in farads)
The formula may vary for other frequen-
cies.
Figure 5. Oscillator Circuit Using RC Configuration
High–Speed CMOS Logic Data
DL129 — Rev 6
5
MOTOROLA
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet MC74HC4060.PDF ] | |
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