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PDF DM9331A Data sheet ( Hoja de datos )

Número de pieza DM9331A
Descripción 100 Mbps Twisted Pair/Fiber Ethernet Media Converter Chip
Fabricantes DAVICOM 
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DM9331A
100 Mbps Twisted Pair/Fiber Ethernet Media Converter Chip
1. General Description
The DM9331A is a physical-layer, single-chip, low
power transceiver for media converter application. On
the media side, it provides a direct interface either to
Unshielded Twisted Pair Category 5 Cable (UTP5)
for 100BASE-TX Fast Ethernet, and it also provides
PECL interface to connect the external fiber optical
transceiver. Through the Media Converter Interface
(MCI), the DM9331A connects to another DM9331A
for the twisted pair to the fiber media converter, or
fiber to fiber repeater.
The DM9331A uses a low-power and
high-performance CMOS process. It contains the
entire physical layer functions of 100BASE-TX as
defined by IEEE802.3u, including the Physical
Coding Sublayer (PCS), Physical Medium
Attachment (PMA), Twisted Pair Physical Medium
Dependent Sublayer (TP-PMD) and a PECL
compliant interface for a fiber optical module,
compliant with ANSI X3.166. The DM9331A provides
a strong support for the auto-negotiation function,
utilizing automatic selection of full or half-duplex
mode. Furthermore, due to the built-in wave-shaping
filter, the DM9331A needs no external filter to
transport signals to the media on the 100base-TX
Ethernet operation.
2. Block Diagram
100Base-FX
PECL
Interface
100Base-TX
Transceiver
Clock
Circuit
Block
100Base-
TX
PCS
Media
Converter
Interface
Auto-Negotiation
TX/RX Module
Biasing/
Power
Block
MII
Register
LED Driver
MII
Management
Control
Preliminary
Version: DM9331A-DS-P02
October 7, 2008
1

1 page




DM9331A pdf
4. Pin Configuration
DM9331A
100 Mbps Twisted Pair/Fiber Ethernet Media Converter Chip
RXDV
DIAG_ACT
DVDD
RESET#
DVDD
NC
OSCIN
DGND
SD
AGND
BGRESG
BGRES
37
38
39
40
41
42
43
44
45
46
47
48
DM9331A
24 MDC
23 DVDD
22 TXCLK
21 TXEN
20 TXD[0]
19 TXD[1]
18 LNKFAULTEN
17 LNKFAULT#
16 DVDD
15 DGND
14 TPFAULT
13 LINK/ACTLED#/OP2
Preliminary
Version: DM9331A-DS-P02
October 20, 2008
5

5 Page





DM9331A arduino
DM9331A
100 Mbps Twisted Pair/Fiber Ethernet Media Converter Chip
7. Functional Description
The DM9331A Fast Ethernet single-chip transceiver,
providing the functionality as specified in IEEE 802.3u,
integrates a complete 100Base-TX module and a complete
100Base-FX module. The DM9331A provides a Media
Converter Interface (MCI) as connection interface.
The DM9331A performs all PCS (Physical Coding
Sublayer), PMA (Physical Media Access), TP-PMD
(Twisted Pair Physical Medium Dependent) sublayer and a
PECL compliant interface for a fiber optic module.
Figure 1 shows the major functional blocks implemented in
the DM9331A.
Media
Converter
Interface
(MCI)
100Base-TX/FX
Transmitter
100Base-TX/FX
Receiver
MII Serial
Management
Interface
Auto
Negotiation
Figure 7-1
7.1 MCI Interface
The DM 9331A provides a Media Converter Interface (MCI)
The purpose of the MCI interface is to provide a simple,
easy to implement connection to another DM9331A.
The MCI consists of a 2-bit receive data bus, a 2-bit transmit
data bus, and controls signals to facilitate data transfers
between the two DM9331A chips.
TXD (transmit data) is a 2-bit data that is driven by the
reconciliation sublayer synchronously with respect to
OSCIN clock. For each OSCIN clock period, which
TXEN is asserted, TXD (1:0) is accepted for
transmission by the PHY.
TXEN (transmit enable) inputs from another DM9331A
RXDV signal reconciliation sublayer indicates that data
is being presented on the MCI for transmission on the
physical medium.
RXD (receive data) is a 2-bit data that are sampled by
the reconciliation sublayer synchronously with respect
to OSCIN clock. For each OSCIN clock period, which
RXDV is asserted, RXD (1:0) is transferred from the
PHY to another DM9331A.
RXDV (receive data valid) output to another DM9331A
TXEN signal indicates that the DM9331A is data ready.
Preliminary
Version: DM9331A-DS-P02
October 20, 2008
11

11 Page







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