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PDF DM9301 Data sheet ( Hoja de datos )
| Número de pieza | DM9301 | |
| Descripción | 100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter | |
| Fabricantes | DAVICOM | |
| Logotipo |  |
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DM9301
100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter
General Description
The DM9301 is a physical-layer, single-chip, low-
power media converter for 100BASE-TX/FX full
duplex repeater applications. On the TX media side,
it provides a direct interface to Unshielded Twisted
Pair Cable 5 (UTP5) for 100BASE-TX Fast Ethernet.
On the FX media side, it provides a direct interface to
a Pseudo Emitter Coupled Logic level interface
(PECL).
The DM9301 uses a low power and high
performance CMOS process. It contains the entire
physical layer functions of 100BASE-TX as defined
by IEEE802.3u, including the Physical Coding
Sublayer (PCS), Physical Medium Attachment
(PMA), Twisted Pair Physical Medium Dependent
Sublayer (TP-PMD) and a PECL compliant interface
for a fiber optic module, compliant with ANSI X3.166.
The DM9301 provides two independent clock
Block Diagram
recovery circuits to minimize bit delay through the
converter (no FIFO are used to buffer data between
the FX and TX interfaces). Furthermore, due to the
excellent rise/fall time control by a built-in wave-
shaping filter, the DM9301 needs no external filter to
transport signals to the media on the 100Base-TX
interface.
Patent-Pending Circuits
• Smart adaptive receiver equalizer
• Digital algorithm for high frequency clock/data
recovery circuit
• High speed wave-shaping circuit
PECLSD
FXSD
RCVR
Link Status
Monitor &
LED Driver
25M FXRXCLK
125M FXRXCLK
Rise/Fall
Time
CTL
PECLRXI +/-
PECL
RCVR
25M
OSC/XTAL
RX
CRM
NRZI
to
NRZ
CGM
Serial to
Parallel
TX Code-
group
Alignment
Monitor
Scrambler
FX Code-
group
Alignment
Monitor
Parallel
to Serial
NRZ
to
NRZI
25M TPRXCLK
125M TPRXCLK
PECLTXO +/-
PECL
TXMT
NRZ
to
NRZI
Parallel
to Serial
Descrambler
Serial to
Parallel
NRZI
to
NRZ
RX
CRM
NRZI to
MLT-3
MLT-3 to
NRZI
MLT-3
Driver
Adaptive
EQ
TPTXO+/-
TPRXI+/-
Final
Version: DM9301-DS-F02
May 8, 2000
1
1 page  
DM9301
100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter
Pin Description
Pin No.
Media Interface
1, 2
Pin Name
TPRXI+,
TPRXI-
13, 14
TPTXO-,
TPTXO+
24, 25
PECLRXI-,
PECLRXI+
18, 19
22, 23
PECLTXO-,
PECLTXO+
PECLSD-,
PECLSD+
Clock and Misc. Interface
27 OSCI/X1
28 X2
30 OSC/XTL#
8 BGREF
9 BGRET
I/O Description
I 100Mbps-TX Differential Input Pair:
These pins are differential receive input for 100BASE-
TX. They are capable of receiving 100BASE-TX MLT-3
data.
O 100BASE-TX Differential Output Pair:
These outputs drive MLT-3 encoded data over 100Mbps
twisted pair cable and provide controlled rise and fall
times designed to filter the transmitter output,
reducing any associated EMI.
I 100BASE-FX PECL Receive Data Differential Pair:
These pins are differential receive input for 100BASE-
FX PECL. They are capable of receiving PECL
100BASE-FX NRZI data.
O 100BASE-FX Transmit Differential Output Pair:
These outputs drive NRZI encoded data for PECL FX
interface.
I 100BASE-FX PECL Signal detect:
These pins are differential signals that indicate to the
DM9301 that the Optical Module interface is detecting
valid optical energy.
I Crystal or Oscillator Input:
This pin should connect to one side of a 25MHz, 50ppm
crystal if OSC/XTL#=0. This pin is the 25MHz, 50ppm
external TTL oscillator input, if OSC/XTLB=1.
O Crystal Oscillator Output:
The other side of a 25MHz, 50ppm crystal should
connect to this pin if OSC/XTL#=0. Leave this pin open
if OSC/XTL#=1.
I Crystal or Oscillator Selector Pin:
OSC/XTL#=0: An external 25MHz, 50ppm crystal
should connect to X1 and X2 pins.
OSC/XTL#=1: An external 25MHz, 50ppm oscillator
should connect to X1 and left X2 pin
open.
I Bandgap Voltage Reference Resistor:
It connects to a 6.49KΩ, 1% error tolerance resistor
between this pin and BGRET pin 9 to provide an
accurate current reference for the chip.
I Bandgap Return
Return pin for 6.49KΩ resistor connection, DO NOT
CONNECT TO GROUND.
Final
Version: DM9301-DS-F02
May 8, 2000
5
5 Page 
DM9301
100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter
FX Serial to Parallel Converter
The Serial to Parallel converter receives a serial
data stream from the NRZI to NRZ converter, and
converts the data stream to parallel data to be
presented to the scrambler. The parallel data format
presented to the TX scrambler is 5B coded.
FX Code Group Alignment Monitor
The FX Code Group Alignment block receives non-
aligned 5B data from the FX Serial to Parallel
converter and monitors it for 5B code group
violations. FX Code Group Alignment occurs after
the J/K is detected, and subsequent data is
monitored on a fixed boundary. If a violation is
detected, the FX Code Group Alignment Monitor
block signals the error to the Link Status Monitor
block. In turn, the Link Status Monitor block flashes
the FX error LED (FXERRLED#).
TX Scrambler
The scrambler also receives data from the FX Serial
to Parallel converter. Data from the serial to parallel
conversion block is 5B symbol encoded. The
scrambler is required to control the radiated
emissions (EMI) by spreading the transmit energy
across the frequency spectrum at the media
connector and on the twisted pair cable in 100Base-
TX transmit operation.
By scrambling the data, the total energy presented
to the cable is randomly distributed over a wide
frequency range. Without the scrambler, energy
levels on the cable could peak beyond FCC
limitations at frequencies related to repeated 5B
sequences like continuous transmission of IDLE
symbols. The scrambler output is combined with the
NRZ 5B data from the FX Serial to Parallel
converter via an XOR logic function. The result is a
scrambled data stream with sufficient randomization
to decrease radiated emissions at critical
frequencies.
TX Parallel to Serial Converter
The TX Parallel to Serial converter receives parallel
5B scrambled data from the scrambler and
serializes it (converts it from a parallel to a serial
data stream). The serialized data stream is then
presented to the NRZ to NRZI converter block
TX NRZ to NRZI Converter
After the transmit data stream has been scrambled
and serialized, the data must be NRZI encoded for
compatibility with the TP-PMD standard for
100Base-TX transmission over Category-5
unshielded twisted pair cable.
TX MLT-3 Converter
The MLT-3 conversion is accomplished by
converting the data stream output from the NRZI
encoder into two binary data streams with
alternately phased logic one events.
TX MLT-3 Driver
The two binary data streams created at the MLT-3
converter are fed to the twisted pair output driver
which converts these streams to current sources
and alternately drives either side of the transmit
transformer primary winding resulting in a minimal
current MLT-3 signal.
Final
Version: DM9301-DS-F02
May 8, 2000
11
11 Page | ||
| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet DM9301.PDF ] | |
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