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PDF DM9621A Data sheet ( Hoja de datos )
| Número de pieza | DM9621A | |
| Descripción | USB2.0 to 10/100M Fast Ethernet Controller | |
| Fabricantes | DAVICOM | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de DM9621A (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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DM9621A
USB2.0 to Fast Ethernet Controller
DAVICOM Semiconductor, Inc.
DM9621A
USB2.0 to 10/100M Fast Ethernet Controller
DATA SHEET
Final
Doc No: DM9621A-13-MCO-DS-F01
June 30, 2015
Final
Version: DM9621A-13-MCO-DS-F01
June 30, 2015
1
1 page  
DM9621A
USB2.0 to Fast Ethernet Controller
1 Features
l USB Interface
§ USB2.0 Device
§ Support 12Mbps full speed operation
§ Support 480Mbps high speed operation
§ Support suspend mode and remote wake-up resume
§ Support USB standard commands
§ Support vendor specific commands
§ Efficient TX/RX FIFO auto management.
§ Embedded SRAM for RX/TX packet buffering
§ Supports 4 endpoints (Control, Interrupt, Bulk_IN, Bulk_OUT)
§ Supported Classes：USB Common Class / USB Communications Class
l Ethernet
§ Support IEEE802.3u 100BASE-TX and with IEEE802.3 10BASE-T standards
§ Support IEEE802.3x flow control function for 100BASE-TX and 10BASE-T.
§ Support IEEE 802.3az Energy Efficient Ethernet (EEE)
§ Built-in 10/100Mbps Fast-Ethernet PHY with Auto-MDIX
§ Supports RMII interface or 8 pins GPIO
§ Support Auto-Negotiation function
§ Back Pressure Mode for Half-Duplex mode flow Control
§ PAUSE frame for Full-Duplex flow control
§ Support Power management: Wake-on-LAN, ARP/NDP Offload
§ Supports GPIO, wakeup frame, link status change and Magic packet events for
remote wake-up
§ Support TCP / UDP / IPv4 checksum offload checking and generating
l EEPROM Interface
§ Supports 128/256/512 bytes (93C46/93C56/93C66) of serial EEPROM(for storing
USB Descriptors)
§ 93C46/93C56/93C66 auto-detection
Final
Doc No: DM9621A-13-MCO-DS-F01
June 30, 2015
5
5 Page 
3.2.6 Miscellaneous
Pin No.
Pin Name
25 SMI_D
26 SMI_CK
32 VBUS_IN
33 WOL
34 RSTB
31 TEST2
30 TEST1
DM9621A
USB2.0 to Fast Ethernet Controller
I/O Description
I/O Serial Management Interface Data.
Tie to ground in application.
I/O Serial Management Interface Clock.
Tie to ground in application.
This pin can also as a GPIO wakeup event defined in register 0FH.
I VBUS input
Tie to high in bus power mode
O Issue a wake-up signal when wake-up event happens.
I Hardware Reset
Active low signal to initiate the DM9621A
I Test Mode 2, tie to ground in application.
I Define Pin11-15, 17-19 mode
1 = GPIO controlled by registers 34H~35H
0 = RMII
3.2.7 Power
Pin No.
24,45
16,48
Pin Name
VCC3
GND
I/O
P Digital Power 3.3V
P Digital Ground
Description
3.3 Strap Pin Table
1: pull-high 1K~10K, 0: default floating.
Pin No.
Pin Name
Description
12
TXD[1]
1 = EEPROM force to 93C46 type
0 = EEPROM type auto-detection
13
TXD[0]
RX packet header format
1 = 4-byte Ethernet RX header mode :
The 4 bytes in Ethernet RX packet header are RX _flag, RX_status,
byte_ctr_low, and byte_ctr_high respectively.
0 = 3-byte Ethernet RX packet header mode:
The 3 bytes in Ethernet RX packet header are RX_status, byte_ctr_low,
and byte_ctr_high respectively.
22
EECS
1 = 12MHz clock from external crystal
0 = 12MHz clock from internal PLL
Final
Doc No: DM9621A-13-MCO-DS-F01
June 30, 2015
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet DM9621A.PDF ] | |
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