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PDF DM9081 Data sheet ( Hoja de datos )
| Número de pieza | DM9081 | |
| Descripción | 10BASE-T Hub Controller | |
| Fabricantes | DAVICOM | |
| Logotipo |  |
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General Description
The 10BASE-T Hub Controller (DM9081) provides a
system level solution for designing IEEE-compliant
802.3 repeaters that incorporate 10BASE-T
transceivers. This device integrates the repeater
functions specified by section 9 of the IEEE 802.3
standard. The Twisted Pair transceiver is compliant
with 10BASE-T standards. The DM9081 provides
eight integral Twisted Pair Media Attachment Units
(MAUs) and two Attachment Unit Interface (AUI)
DM9081
10BASE-T Hub Controller
ports in a 100-pin QFP package.
The total number of ports per repeater unit can be
increased by connecting multiple DM9081 chips via
their expansion ports. The DM9081 supports LED
drivers to monitor port status. It displays Link, Carrier
Sense, Collision, Partition, and Bit Rate Error Status.
In minimum mode, Link, Carrier Sense, and Collision
Status can be displayed without external TTL
devices.
Block Diagram
EXPIN#
EXPOUT#
DAT
TX
MUX
PREAMBLE
JAM SIGNAL
FIFO
RX_CLK
MANCHESTER
DECODER
PLL
RX
MUX
DATA IN
AUI
PORT1
AUI
PORT2
NRZ DATA
MUX
MANCHESTER
ENCODER
DATA OUT
EXPANSION
PORT
LED PORT1
STATE
MACHINE
TIMER
LED PORT2
TP
PORT0
*
*
*
*
*
TP
PORT7
RXP1
RXN1
CDP1
CDN1
TXP1
TXN1
RXP2
RXN2
CDP2
CDN2
TXP2
TXN2
RXD0+
RXD0-
TPO0+
DTPO0+
DTPO0-
TPO0-
RXD7+
RXD7-
TPO7+
DTPO7+
DTPO7-
TPO7-
Final
Version: DM9081-DS-F02
February 02, 2001
1
1 page  
DM9081
10BASE-T Hub Controller
Pin Description
Pin No.
Pin Name
I/O
Description
Miscellaneous
3, 4, 9,
DVDD
P Digital Power
30, 40,
50, 83, 93
14, 21,
DGND
P Digital Ground
35, 45,
88, 98
18
RESET#
I Active low to reset the internal logic of DM9081. It should be
synchronized to X2 if multiple DM9081s
are used
20, 19
TESTPIN0
I These two pins are used to select LED display mode. Normal mode is
TESTPIN1
selected if both pins are connected to VDD. Minimum mode is selected
if both pins are connected to GND. Other settings are prohibited
26, 29
NC - These pins should be left open
27 X2 I A 20MHz oscillator or crystal should be attached to this pin
28 X1 O This pin is used in crystal connection only. It is left open when using an
oscillator
67, 81
AVDD
P Analog Power
68, 82
AGND
P Analog Ground
LED Display Pins
5 LED_LATCH O This pin is used to latch the serial LED information from pins 6 to 13
(LI/RX7)
In minimum mode, this pin sends out TP7 Link and Carrier Sense
status
6
AUI_LED
O This pin transmits AUI port status synchronous to TCK
(LI/RX6)
In minimum mode, this pin sends out TP6 Link and Carrier Sense
status
7 TP_BIT_LED O This pin sends out global bit rate error status of the DM9081 Hub
(LI/RX5)
In minimum mode, this pin sends out TP5 Link and Carrier Sense
status
8 TP_POL_LED O In minimum mode, this pin sends out TP4 Link and Carrier Sense
(LI/RX4)
status
10 TP_JAB_LED O This pin transmits global jabber status of the DM9081 Hub
(LI/RX3)
In minimum mode, this pin sends out TP3 Link and Carrier Sense
status
11 TRAFFIC_LED O This pin sends out utilization of 10MHz bandwidth synchronous to TCK
(LI/RX2)
In minimum mode, this pin sends out TP2 Link and Carrier Sense
status
12 TP_PAR_LED O This pin sends out the partition status synchronous to TCK for the eight
(LI/RX1)
TP ports
In minimum mode, this pin sends out TP1 Link and Carrier Sense
status
13 TP_LINK_LED O This pin sends out the link and carrier sense status synchronous to
(LI/RX0)
TCK for the eight TP ports
In minimum mode, this pin sends out TP0 Link and Carrier Sense
status
15 AUI1_CRS_LED O Active low for 52ms when AUI Port 1 detects carrier
16 AUI2_CRS_LED O Active low for 52ms when AUI Port 2 detects carrier
17
COL_LED
O Active low for 26ms when collision is detected
25
TCK
O A 10MHz clock synchronous to X2
Final
Version: DM9081-DS-F02
February 02, 2001
5
5 Page 
DM9081
10BASE-T Hub Controller
AUI Ports Status
The AUI_LED pin transmits the status of DM9081's
two AUI ports on the falling edge of TCK. Figure 5
shows a typical external hardware setup employed to
convert a serial bit stream into parallel form. The
accuracy of the AUI signals is within 8 Bit Times (BT).
The contents of the output data for the AUI_LED are
as followed:
Bit 0: AUI port 1 partition status (0: if partition)
Bit 1: AUI port 1 bit rate error status (0: if bit rate
error)
Bit 2: AUI port 1 jabber status (0: if jabber)
Bit 3: AUI port 1 loopback status (0: if loopback error)
Bit 4: AUI port 2 partition status (0: if partition)
Bit 5: AUI port 2 bit rate error status (0: if bit rate
error)
Bit 6: AUI port 2 jabber status (0: if jabber)
Bit 7: AUI port 2 loopback status (0: if loopback error)
TP Ports Bit Rate Error Status
The TP_BIT_LED pin sends out global bit rate error
information of the DM9081's Hub.
TP Ports Jabber Status
The TP_JAB_LED pin sends out global jabber
information of the DM9081's Hub.
TP Ports Partition Status
The TP_PAR_LED pin transmits partition information
for the DM9081's eight TP ports on the falling edge of
TCK. Figure 4 shows a typical external hardware
configuration employed to convert the serial bit
stream into parallel form. The accuracy of the
partition signals is 8 bit. If a TP port is in partition
status, its corresponding bit is set to low. The
contents of the output data for the TP_PAR_LED are
as followed:
Bit 0: TP port 0 partition status
Bit 1: TP port 1 partition status
Bit 2: TP port 2 partition status
Bit 3: TP port 3 partition status
Bit 4: TP port 4 partition status
Bit 5: TP port 5 partition status
Bit 6: TP port 6 partition status
Bit 7: TP port 7 partition status
Traffic Status
The TRAFFIC_LED pin transmits a utilization report
for the 10MHz bandwidth on the falling edge of TCK.
Figure 4 shows a typical external hardware
configuration employed to convert the serial bit
stream into parallel form. The accuracy of the traffic
signals is 8 bit. The corresponding bit is set to low, if
the following conditions are met. The contents of the
output data for the TRAFFIC_LED are as followed:
Bit 0: Over 1% utilization of 10MHz bandwidth
Bit 1: Over 6.25% utilization of 10MHz bandwidth
Bit 2: Over 12.5% utilization of 10MHz bandwidth
Bit 3: Over 25% utilization of 10MHz bandwidth
Bit 4: Over 37.5% utilization of 10MHz bandwidth
Bit 5: Over 50% utilization of 10MHz bandwidth
Bit 6: Over 62.5% utilization of 10MHz bandwidth
Bit 7: Over 87.5% utilization of 10MHz bandwidth
As shown above, if all 8 bits are active low, the
utilization is in excess of 87.5% for the 10MHz
bandwidth.
TP Ports Link Status
The TP_LINK_LED transmits link information for the
DM9081's eight TP ports on the falling edge of TCK.
Figure 5 shows a typical external hardware
configuration employed to convert the serial bit
stream into parallel form. The accuracy of the link
signals is within 8 bit. If a TP port is line fail, its
corresponding bit is set to high. If a TP port is line
pass, its corresponding bit is set to low. When this
port receives a packet, its corresponding bit is set
high for 78ms, then driven low at least 52ms until it
responds to the next packet. The contents of the
output data for the TP_LINK_LED are as followed:
Bit 0: TP port 0 link/receive status
Bit 1: TP port 1 link/receive status
Bit 2: TP port 2 link/receive status
Bit 3: TP port 3 link/receive status
Bit 4: TP port 4 link/receive status
Bit 5: TP port 5 link/receive status
Bit 6: TP port 6 link/receive status
Bit 7: TP port 7 link/receive status
Final
Version: DM9081-DS-F02
February 02, 2001
11
11 Page | ||
| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet DM9081.PDF ] | |
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