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PDF DM9008 Data sheet ( Hoja de datos )
| Número de pieza | DM9008 | |
| Descripción | ISA/Plug & Play Super Ethernet Contoller | |
| Fabricantes | Davicom | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de DM9008 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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General Description
The DM9008 Ethernet controller is a highly integrated design
that provides all Medial Access Control (MAC) and
Encode-Decode (ENDEC) functions in accordance with the
IEEE 802.3 standard. Network interfaces include 10BASE5 or
10BASE2 Ethernet via the AUI port and 10BASE-T via the
Twisted-pair. The DM9008 Ethernet controller can interface
directly to the PC-AT ISA bus without any external device. The
interface to PC-AT ISA bus is fully compatible with NE2000
Block Diagram
DM9008
ISA/Plug & Play Super Ethernet Contoller
Ethernet adapter cards, so all software programs designed for
NE2000 can run on the DM9008 card without any modification.
Microsoft's Plug and Play and the jumperless software
configuration function are both supported. The capability of the
PnP and Non-PnP mode auto-switch function allows users to
configure network card. No jumpers or switches are needed to
set when using either the PC or PnP function. The integrated
8Kx16 SRAM and 10BASE-T transceiver make DM9008 more
cost-effective.
Final
Version: DM9008-DS-F02
November 30, 2000
1
1 page  
Pin Description
Pin No.
Symbol
PC ISA BUS INTERFACE PINS
96 - 99
3-5
7
9
11 - 13
15 - 18
20, 22
SA0 - SA3
SA4 - SA6
SA7
SA8
SA9 - SA11
SA14 - SA17
SA18, SA19
26 - 33
88 - 81
SD0 - SD7
SD8 - SD15
2 BALE
14 SYSCLK
19 IOR
21 IOW
23 SMEMR
35 RST
24 AEN
25 IOCHRDY
89 MEMW
90 MEMR
95 IO16
Final
Version: DM9008-DS-F02
November 30, 2000
I/O
I
I/O, Z
I
I
I
I
I
I
I
O I, Z
I
I
O, Z
DM9008
ISA/Plug & Play Super Ethernet Contoller
Description
SYSTEM ADDRESS: These signals are connected to the address
bus of the PC I/O slot. They are used to select the DM9008 I/O ports
or the boot ROM address
SYSTEM DATA: These signals are connected to the data bus of the
PC I/O bus slot. They are used to transfer data between the PC and
the DM9008
ADDRESS LATCH ENABLE: PC ISA bus BALE signal; used only to
define the timing of IOCHRDY in Remote DMA
This pin is not used if the value of bit4 of CRB is 0, and tie to high to
prevent floating.
SYSTEM CLOCK: PC ISA bus system clock
This pin is not used if the value of bit4 of CRB is 0, and tie to high to
prevent floating.
I/O READ: An active low signal used to read data from the DM9008
I/O WRITE: An active low signal used to write data to the DM9008
MEMORY READ: An active low signal used to read boot ROM data
RESET: An active high signal used to power-on reset the DM9008
ADDRESS ENABLE: This is an active low signal used to enable the
system address for the DM9008
I/O CHANNEL READY: The DM9008 sets this signal low to insert
wait states into the PC ISA bus
MEMORY WRITE: PC ISA bus memory write signal
This pin is not used if the value of bite4 of CRB is 0, and tie to high to
prevent floating.
MEMORY READ: PC ISA bus memory read signal
This pin is not used if the value of bit4 of CRB is 0, and tie to high to
prevent floating.
16-BIT I/O: This signal goes low when the data transfer between the
DM9008 and the PC ISA bus is word wide
5
5 Page 
Configuration Register B (CRB)
DM9008
ISA/Plug & Play Super Ethernet Contoller
Configuration Register B can be read at address 0BH in Page 0 of ENC, and can be written by following a read to address 0BH with a
write to address 0BH. If a write to address 0BH is performed without a previous read to 0BH, it will be regarded as a write to register
RBCR1 of ENC.
765
4321
0
-- -- BUSERR CHRDY -- GDLINK PHYS1 PHYS0
Bit Symbol
Description
0, 1 PHYS0 Physical Media Interfaces: These two bits determine which type of physical interface the
PHYS1 DM9008 is using, as shown below:
bit1 bit0 Interface
0 0 Set to 10BASE-T; BNCEN = low
0 1 Set to 10BASE2; BNCEN = high
1 0 Set to 10BASE5; BNCEN = low
1 1 Auto-detection media
2 GDLINK Read: Link status. One indicates Link OK; zero indicates Link Fail
3 -- Reserved
4 CHRDY IOCHRDY from IOR or IOW or from BALE: When low, DM9008 will pull IOCHRDY low after
the command strobe. If high, IOCHRDY will be pulled low after BALE goes high
5 BUSERR Bus Error: This bit shows that DM9008 has detected an ISA bus error. This bit will be high if
DM9008 inserts wait states into a system access and the system terminates the cycle without
inserting wait states
6 -- Reserved
7 -- Reserved
Final
Version: DM9008-DS-F02
November 30, 2000
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet DM9008.PDF ] | |
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