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PDF DM9003 Data sheet ( Hoja de datos )
| Número de pieza | DM9003 | |
| Descripción | 10/100 Mbps 2-port Ethernet Switch Controller | |
| Fabricantes | DAVICOM | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de DM9003 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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DAVICOM Semiconductor, Inc.
DM9003
10/100 Mbps 2-port Ethernet Switch Controller
with General Processor Interface
DATA SHEET
Preliminary
Version: DM9003-DS-P04
May 15, 2008
1 page  
DM9003
2-port Switch with Processor Interface
6.46 Memory Data Pre-Fetch Read Command without Address Increment Register (F0H) ........................ 32
6.47 Memory Data Read Command with Address Increment Register (F2H)................................................ 32
6.48 Memory Data Read Address Register (F4H) ............................................................................................. 32
6.49 Memory Data Read Address Register (F5H) ............................................................................................. 32
6.50 Memory Data Write Command without Address Increment Register (F6H).......................................... 32
6.51 Memory Data Write Command with Address Increment Register (F8H) ............................................... 33
6.52 Memory Data Write Address Register (FAH) ............................................................................................ 33
6.53 Memory Data Write Address Register (FBH) ............................................................................................ 33
6.54 TX Packet Length Registers (FCH~FDH) .................................................................................................. 33
6.55 Interrupt Status Register (FEH).................................................................................................................. 33
6.56 Interrupt Mask Register (FFH).................................................................................................................... 33
7. EEPROM FORMAT........................................................................................................ 34
8. PHY REGISTERS .......................................................................................................... 37
8.1 Basic Mode Control Register (BMCR) – 00H .............................................................................................. 38
8.2 Basic Mode Status Register (BMSR) – 01H ................................................................................................ 39
8.3 PHY ID Identifier Register #1 (PHYID1) – 02H............................................................................................. 40
8.4 PHY ID Identifier Register #2 (PHYID2) – 03H............................................................................................. 40
8.5 Auto-negotiation Advertisement Register (ANAR) – 04H.......................................................................... 40
8.6 Auto-negotiation Link Partner Ability Register (ANLPAR) – 05H ............................................................. 41
8.7 Auto-negotiation Expansion Register (ANER) - 06H ................................................................................. 42
Preliminary datasheet
DM9003-15-DS-P04
May 15, 2008
5
5 Page 
4. Pin Configuration : 64 pin LQFP
DM9003
2-port Switch with Processor Interface
VCNTL
VREF
VCC3
X1
X2
GND
LNK1_LED
SPD1_LED
LNK0_LED
SPD0_LED
TEST2
CMD
VCCI
CS#
IOW#
GND
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
DM9003
32 TEST1
31 GND
30 PWRST#
29 EECS
28 EECK
27 EEDIO
26 VCC3
25 SD15
24 SD14
23 GND
22 SD13
21 SD12
20 SD11
19 SD10
18 SD9
17 SD8
Preliminary datasheet
DM9003-15-DS-P04
May 15, 2008
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet DM9003.PDF ] | |
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