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PDF CHP1102-QGG Data sheet ( Hoja de datos )

Número de pieza CHP1102-QGG
Descripción S-Band 6-bit Phase Shifter
Fabricantes United Monolithic Semiconductors 
Logotipo United Monolithic Semiconductors Logotipo



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No Preview Available ! CHP1102-QGG Hoja de datos, Descripción, Manual

CHP1102-QGG
RoHS COMPLIANT
S-Band 6-bit Phase Shifter
GaAs Monolithic Microwave IC in SMD leadless package
Description
The CHP1102-QGG is 6-bit phase shifter
with an amplifier at its input and output. The
circuit is driven by a TTL compatible parallel
interface. It is designed for radar systems.
The circuit is manufactured with a power
pHEMT process, 0.25µm gate length, via
holes through the substrate and air bridges.
It is supplied in RoHS compliant SMD
package.
UMS
P1102
AUY3AA6YMUU3368W66MM78S6868WA78S78SYAAGYWW
YYYWYWWWGG
SMU
A786863A
GWWYY
Main Features
■ Operating frequency range: 2.7-3.4GHz
■ 5.625° phase step
■ 10dB gain
■ 0/+3.3V phase shifter control voltage
■ 13dBm output @ 1dB comp
■ 28L-QFN5x5
UMS■MSL2
3.4GHz
2.7GHz
3GHz
State
Peak Phase Error vs State @ 2.7, 3, 3.4GHz
(packaged device, board measurement)
Main Characteristics
Tamb= +25°C, V+= +5V, V-= -5V
Symbol
Parameter
Freq
Frequency range
Gain
Small signal gain (state 0)
RMS_PPE RMS Peak Phase Error
Min Typ Max
2.7 3.4
9 10
1.5
ESD Protections: Electrostatic discharge sensitive device observe handling precautions!
Unit
GHz
dB
deg
Ref. : DSCHP1102-QGG5198 - 17 Jul 15
1/16 Specifications subject to change without notice
United Monolithic Semiconductors S.A.S.
Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34

1 page




CHP1102-QGG pdf
S-Band 6-bit Phase Shifter
CHP1102-QGG
Device thermal performances
All the figures given in this section are obtained assuming that the QFN device is cooled
down only by conduction through the package thermal pad (no convection mode
considered).
The temperature is monitored at the package back-side interface (Tcase) as shown below.
The system maximum temperature must be adjusted in order to guarantee that Tcase
remains below than the maximum value specified in the next table. So, the system PCB must
be designed to comply with this requirement.
A derating must be applied on the dissipated power if the Tcase temperature can not be
maintained below than the maximum temperature specified (see the curve Pdiss. Max) in
order to guarantee the nominal device life time (MTTF).
Ref. : DSCHP1102-QGG5198 - 17 Jul 15
5/16 Specifications subject to change without notice
Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34

5 Page





CHP1102-QGG arduino
S-Band 6-bit Phase Shifter
CHP1102-QGG
Typical Test Fixture Measurements in Temperature
T= [-40, +25, +85] °C, V+ = +5V, V- = -5V, packaged device, not de-embedded board
measurement (board drawing 97043)
Peak phase error versus state and temperature (f = 3GHz)
State (0 to 63)
Ref. : DSCHP1102-QGG5198 - 17 Jul 15
11/16
Specifications subject to change without notice
Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34

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