|
|
PDF IDT8T49N008I Data sheet ( Hoja de datos )
| Número de pieza | IDT8T49N008I | |
| Descripción | LVPECL/LVDS Clock Generator | |
| Fabricantes | Integrated Device Technology | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de IDT8T49N008I (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
Programmable FemtoClock® NG LVPECL/LVDS
Clock Generator with 8-Outputs
IDT8T49N008I
DATASHEET
General Description
The IDT8T49N008I is an eight output Clock Synthesizer with
selectable LVDS or LVPECL outputs. The IDT8T49N008I can
synthesize any one of four frequencies from a single crystal or
reference clock. The four frequencies are selected from the
Frequency Selection Table (Table 3A) and are programmed via I2C
interface. The four predefined frequencies are selected in the user
application by two frequency selection pins. Note the desired
programmed frequencies must be used with the corresponding
crystal or clock frequency as indicated in Table 3A.
Excellent phase noise performance is maintained with IDT’s Fourth
Generation FemtoClock® NG PLL technology, which delivers
sub-400fs RMS phase jitter.
Features
• Fourth Generation FemtoClock NG PLL technology
• Eight selectable LVPECL or LVDS outputs
• CLK, nCLK input pair can accept the following differential input
levels: LVPECL, LVDS, HCSL
• FemtoClock NG VCO Range: 1.91GHz - 2.5GHz
• RMS phase jitter at 156.25MHz (12kHz - 20MHz):
228fs (typical)
• RMS phase jitter at 156.25MHz (10kHz - 1MHz): 175fs (typical)
• Full 2.5V or 3.3V power supply
• I2C programming interface
• PCI Express (2.5 Gb/S), Gen 2 (5 Gb/s) and Gen 3 (8 Gb/s) jitter
compliant
• -40°C to 85°C ambient operating temperature
• Lead-free (RoHS 6) packaging
IDT8T49N008ANLGI REVISION A FEBRUARY 13, 2014
Pin Assignment
VEE
SCLK
SDATA
VEE
VCCA
LOCK
VEE
VCC
CLK_SEL
VEE
30 29 28 27 26 25 24 23 22 21
31 20
32 19
33 18
34 17
35 16
36 15
37 14
38 13
39 12
40 11
1 2 3 4 5 6 7 8 9 10
FSEL1
VCC
VEE
ADDR_SEL
FSEL0
nCLK
CLK
VEE
XTAL_OUT
XTAL_IN
IDT8T49N008I
40-Lead VFQFN
6mm x 6mm x 0.925mm package body
4.65mm x 4.65mm E-Pad
NL Package
1 ©2014 Integrated Device Technology, Inc.
1 page  
IDT8T49N008I Data Sheet
PROGRAMMABLE FEMTOCLOCK® NG LVPECL/LVDS CLOCK GENERATOR WITH 8-OUTPUTS
Table 3B. I2C Register Map
Register
0
1
2
3
4
5
6
7
8
9
10
11
Binary
Register
Address
00000
00001
00010
00011
00100
00101
00110
00111
01000
01001
01010
01011
12 01100
13 01101
14 01110
15 01111
16 10000
17 10001
18 10010
19 10011
20 10100
21 10101
22 10110
23 10111
D7
M0[8]
M1[8]
M2[8]
M3[8]
unused
unused
unused
unused
unused
unused
unused
unused
LVDS_
SEL0[Q7]
LVDS_
SEL1[Q7]
LVDS_
SEL2[Q7]
LVDS_
SEL3[Q7]
OE0[Q7]
OE1[Q7]
OE2[Q7]
OE3[Q7]
reserved
unused
unused
unused
D6
M0[7]
M1[7]
M2[7]
M3[7]
N0[6]
N1[6]
N2[6]
N3[6]
BYPASS0
BYPASS1
BYPASS2
BYPASS3
LVDS_
SEL0[Q6]
LVDS_
SEL1[Q6]
LVDS_
SEL2[Q6]
LVDS_
SEL3[Q6]
OE0[Q6]
OE1[Q6]
OE2[Q6]
OE3[Q6]
reserved
unused
unused
unused
D5
M0[6]
M1[6]
M2[6]
M3[6]
N0[5]
N1[5]
N2[5]
N3[5]
PS0[1]
PS1[1]
PS2[1]
PS3[1]
LVDS_
SEL0[Q5]
LVDS_
SEL1[Q5]
LVDS_
SEL2[Q5]
LVDS_
SEL3[Q5]
OE0[Q5]
OE1[Q5]
OE2[Q5]
OE3[Q5]
reserved
unused
unused
unused
Register Bit
D4
M0[5]
M1[5]
M2[5]
M3[5]
N0[4]
N1[4]
N2[4]
N3[4]
PS0[0]
PS1[0]
PS2[0]
PS3[0]
LVDS_
SEL0[Q4]
LVDS_
SEL1[Q4]
LVDS_
SEL2[Q4]
LVDS_
SEL3[Q4]
OE0[Q4]
OE1[Q4]
OE2[Q4]
OE3[Q4]
reserved
unused
unused
unused
D3
M0[4]
M1[4]
M2[4]
M3[4]
N0[3]
N1[3]
N2[3]
N3[3]
P0[1]
P1[1]
P2[1]
P3[1]
LVDS_
SEL0[Q3]
LVDS_
SEL1[Q3]
LVDS_
SEL2[Q3]
LVDS_
SEL3[Q3]
OE0[Q3]
OE1[Q3]
OE2[Q3]
OE3[Q3]
reserved
unused
unused
unused
D2
M0[3]
M1[3]
M2[3]
M3[3]
N0[2]
N1[2]
N2[2]
N3[2]
P0[0]
P1[0]
P2[0]
P3[0]
LVDS_
SEL0[Q2]
LVDS_
SEL1[Q2]
LVDS_
SEL2[Q2]
LVDS_
SEL3[Q2]
OE0[Q2]
OE1[Q2]
OE2[Q2]
OE3[Q2]
reserved
unused
unused
unused
D1
M0[2]
M1[2]
M2[2]
M3[2]
N0[1]
N1[1]
N2[1]
N3[1]
CP0[1]
CP1[1]
CP2[1]
CP3[1]
LVDS_
SEL0[Q1]
LVDS_
SEL1[Q1]
LVDS_
SEL2[Q1]
LVDS_
SEL3[Q1]
OE0[Q1]
OE1[Q1]
OE2[Q1]
OE3[Q1]
unused
unused
unused
unused
D0
M0[1]
M1[1]
M2[1]
M3[1]
N0[0]
N1[0]
N2[0]
N3[0]
CP0[0]
CP1[0]
CP2[0]
CP3[0]
LVDS_
SEL0[Q0]
LVDS_
SEL1[Q0]
LVDS_
SEL2[Q0]
LVDS_
SEL3[Q0]
OE0[Q0]
OE1[Q0]
OE2[Q0]
OE3[Q0]
unused
unused
unused
unused
IDT8T49N008ANLGI REVISION A FEBRUARY 13, 2014
5
©2014 Integrated Device Technology, Inc.
5 Page 
IDT8T49N008I Data Sheet
PROGRAMMABLE FEMTOCLOCK® NG LVPECL/LVDS CLOCK GENERATOR WITH 8-OUTPUTS
Table 4C. LVCMOS/LVTTL DC Characteristics, VCC = VCCO = 3.3V ± 5% or 2.5V ± 5%, VEE = 0V, TA = -40°C to 85°C
Symbol Parameter
Test Conditions
Minimum
Typical
Maximum Units
SCLK, SDATA,
VIH
Input High
Voltage
FSEL[1:0],
CLK_SEL,
ADDR_SEL
VCC = 3.3V
VCC = 2.5V
2
1.7
VCC + 0.3
VCC + 0.3
V
V
SCLK, SDATA,
VIL
Input Low
Voltage
CLK_SEL,
ADDR_SEL
VCC = 3.3V
VCC = 2.5V
-0.3
-0.3
FSEL[1:0],
VCC = 3.3V or 2.5V
SCLK, SDATA
VCC = VIN = 3.465V or 2.625V
IIH
Input
FSEL[1:0],
High Current CLK_SEL,
VCC = VIN = 3.465V or 2.625V
ADDR_SEL
0.8 V
0.7 V
0.5 V
5 µA
150 µA
IIL
Input
Low Current
SCLK, SDATA
FSEL[1:0],
CLK_SEL,
ADDR_SEL
VCC = 3.465V or 2.625V,
VIN = 0V
VCC = 3.465V or 2.625V,
VIN = 0V
-150
-5
µA
µA
Output High LOCK
VOH
Voltage;
NOTE 1
LOCK
VCC = 3.465V
VCC = 2.625V
2.6
1.8
V
V
Output Low
VOL
Voltage;
LOCK
NOTE 1
VCC = 3.465V or 2.625V
0.5 V
NOTE 1: Output terminated with 50 to VCCO/2. See Parameter Measurement Information, Output Load Test Circuit diagrams.
Table 4D. Differential DC Characteristics, VCC = VCCO = 3.3V ± 5% or 2.5V ± 5%, VEE = 0V, TA = -40°C to 85°C
Symbol Parameter
Test Conditions
Minimum
Typical
Maximum
IIH
Input
High Current
CLK, nCLK
VCC = VIN = 3.465V or 2.625V
150
IIL
VPP
VCMR
Input
nCLK
Low Current CLK
Peak-to-Peak Voltage
Common Mode Input Voltage;
NOTE 1
VCC = 3.465V or 2.625V, VIN = 0V
VCC = 3.465V or 2.625V, VIN = 0V
-150
-5
0.15
VEE
1.3
VCC – 0.85
NOTE 1: Common mode input voltage is at the cross point.
Units
µA
µA
µA
V
V
Table 4E. LVPECL DC Characteristics, VCC = VCCO = 3.3V±5%, VEE = 0V, TA = -40°C to 85°C
Symbol Parameter
Test Conditions
Minimum
Typical
VOH
VOL
VSWING
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
Peak-to-Peak Output
Voltage Swing
VCC – 1.1
VCC – 2.0
0.6
NOTE 1: Outputs termination with 50 to VCC – 2V.
Maximum
VCCO – 0.75
VCCO – 1.6
Units
V
V
1.0 V
IDT8T49N008ANLGI REVISION A FEBRUARY 13, 2014
11
©2014 Integrated Device Technology, Inc.
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet IDT8T49N008I.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| IDT8T49N008I | LVPECL/LVDS Clock Generator | Integrated Device Technology |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |