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PDF BM81004MUV Data sheet ( Hoja de datos )

Número de pieza BM81004MUV
Descripción 12V Input Multi-Channel System Power Supply IC
Fabricantes ROHM Semiconductor 
Logotipo ROHM Semiconductor Logotipo



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Datasheet
Power supply IC series for TFT-LCD panels
12V Input Multi-Channel
System Power Supply IC
BM81004MUV
General Description
BM81004MUV is a system power supply for TFT-LCD
panels used for liquid crystal TVs. This IC is
incorporated with Negative and Positive charge pump
controller and Gate Pulse Modulation (GPM) function. It
also features built-in EEPROM to contain each setting
voltage, soft start time etc.
Features
Step-up DC/DC converter (AVDD).
(Synchronous rectification, Built-in load switch).
Step-down DC/DC converter 1(VIO).
(Non-synchronous rectification).
Step-down DC/DC converter 2(VCORE).
Step-down DC/DC converter 3(HAVDD).
(Synchronous rectification).
Positive charge pump controller (VGH).
Negative charge pump controller (VGL).
Gate Pulse Modulation (GPM) function.
High Voltage LDO (50mA)
10 bit DAC-controlled Gamma Amplifier 4ch
8 bit DAC-controlled VCOM Amplifier
Output voltage control by I2C.
Built-in EEPROM.
Switching Frequency 750kHz (AVDD, VIO).
Switching Frequency 1MHz (VCORE, HAVDD).
Applications
TFT-LCD panel
Typical Application Circuit 1
TOP VIEW
SW
VGH
Key Specifications
Input voltage range
AVDD Output voltage range
VIO Output voltage range
HAVDD Output voltage range
VGH Output voltage range
VGL Output voltage range
Switching Frequency
Operating temperature range
8.6V to 14.0V
11.7V to 18.0V
2.2V to 3.7V
4.8V to 11.1V
25V to 40.5V
-10.2V to -4.0V
750kHz(Typ)
1MHz(Typ)
-40to +105
Package
VQFN48V7070A
W(Typ) x D(Typ) x H(Max)
7.00mm x 7.00mm x 1.0mm
SW
AVDD
HAVDD
VIN
VCORE
VIO
PGND2
SWB2
VDD2
VINB2
VINB1
VINB1
N.C.
SWB1
SWB1
AMPGND
AMP4
AMP3
BM81004MUV
PGATE
AVDDS
SWO
SWI
SW
SW
PGND
PGND
VL
COMP
AGND
CTRL
SWB1
VGL
AVDD
VIN
VIN
AVDD
Figure 1. Application Circuit 1
Product structureSilicon monolithic chip This chip is not designed for protection against ratio active rays.
www.rohm.com
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ2211114001
1/49
TSZ02201-0313AAF00420-1-2
4.Dec.2014 Rev.002

1 page




BM81004MUV pdf
BM81004MUV
Block Diagram
AVDD
HVLDO
HVCC
HVLDO
VCOM
INN
AMP1
AMP2
AMP3
AMP4
AMPGND
VIN
AVIN
VL
HVCC
HVLDO
HVCC
+
OPAMP
-
HVLDO
HVCC
+
-
+
-
+
-
+
-
DAC
INTERNAL
REGULATOR
EEPROM
SDA
SCL
A0
I2C
INTERFACE
DAC
SEQUENCE
EN CONTROL
PG
BOOST
CONVERTER
BUCK
CONVERTER 1
BUCK
CONVERTER 2
BUCK
CONVERTER 3
VGH
REGULATOR
VGL
AGND
VGL
VGL
DRVN
GPM
CTRL
COMP
PGATE
AVDDS
SWO
SWI
SW
PGND
VINB1
SWB1
AVDD
VIN
VIN
VIO
VDD1
VINB2
SWB2
PGND2
VIN
VDD2
VINB3
SWB3
PGND3
VDD3
DRVP
VGH
VGH
VGHM
RE
VCORE
HAVDD
SW
AVDD
SW
www.rohm.co.jp
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111 15 001
SWB1
Figure 4. Block Diagram
5/49
TSZ02201-0313AAF00420-1-2
4.Dec.2014 Rev.002

5 Page





BM81004MUV arduino
BM81004MUV
Electrical Characteristics
(Unless otherwise specified, Ta=25, AVIN,VINB1,VINB2,VINB3=12V)
Parameter
Limits
Symbol
MIN TYP
HIGH VOLTAGE LDO
MAX
Output Voltage Range
LDO
11.7
18.0
Unit Condition
V 0.1V step
Regulation Voltage
LDO_R 15.12 15.2 15.28 V 23h, 0.5%
LDO_R
Over-Current Protection
ILIM_
LDO
HVLDO UVP Detecting Voltage LDO_UVP
15.09
-
-
15.2
100
LDOx0.8
15.31
-
-
V 23h, 0.7%, 0 < Ta < 50
mA
V
VCOM AMPLIFIER
Output Voltage Range
VCOM_R
HVLDO
X0.36
HVLDO
X0.54
V
Slew Rate
SR - 30 - V/usec No external components
Output Current Capability
I_VCOM
-
±200
-
mA C2h
Load Stability
ΔVO1 - ±15 - mV Io=-50mA50mA
DAC Resolution
RES1 8 Bit
DAC Integral Non-linearity Error
02FD is the allowable margin
(INL)
LE1 -1 - +1 LSB of error against the ideal linear.
DAC Differential Non-linearity
02FD is the allowable margin
Error (DNL)
DLE1
-1
-
+1 LSB of error against the ideal
increase of 1LSB.
GAMMA AMPLIFIER
Output Current Capability
I_AMP
30
-
- mA
Load Stability
ΔVO2 - ±15 - mV Io=-5mA5mA
DAC Resolution
RES2
10
DAC Integral Non-linearity Error
(INL)
LE2
-2
-
DAC Differential Non-linearity
Error (DNL)
DLE2
-2
This product has no designed for protection against radioactive rays.
-
Bit
00F 3F0 is the allowable
+2 LSB margin of error against the ideal
linear.
00F 3F0 is the allowable
+2 LSB margin of error against the ideal
increase of 1LSB.
www.rohm.co.jp
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111 15 001
11/49
TSZ02201-0313AAF00420-1-2
4.Dec.2014 Rev.002

11 Page







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