PDF XR81101 Data sheet ( Hoja de datos )

Número de pieza	XR81101
Descripción	LVCMOS Clock Synthesizer
Fabricantes	Exar
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No Preview Available ! XR81101 Universal Clock - High Frequency LVCMOS Clock Synthesizer General Description The XR81101-AA02 is a clock synthesizer operating at a 3.3V/2.5V sup- ply with Integer divider, using a 25MHz parallel resonant crystal reference input provides a 125MHz LVCMOS output. The device is optimized for use with a 25MHz crystal (or system clock) and generates a 125MHz out- put clock for GE applications. The LVCMOS output has very low phase noise jitter of sub 150fs, while consuming extremely low power. The application diagram below shows a typical synthesizer configuration with any standard crystal oscillating in fundamental mode. Internal load capacitors are optionally available to minimize/eliminate external crystal loads. A system clock can also be used to overdrive the oscillator for a synchronous timing system. The typical phase noise plot below shows the jitter integrated over the 1.875MHz to 20MHz range that is widely used in WAN systems. These clock devices show a very good high frequency noise floor below -150dB. The XR81101 is a family of Universal Clock synthesizer devices in TSSOP-8 packages. The devices generate ANY frequency in the range of 10MHz to 200MHz by utilizing a highly flexible delta sigma modulator and a wide ranging VCO. These devices can be used with standard crystals or external system clock to support a wide variety of applications. This family of products has an extremely low power PLL block with core power con- sumption 40% less than the equivalent devices from competition. By sec- ond sourcing several of the existing sockets, these devices provides a very compelling power efficiency value benefit across all market seg- ments. Other clock multiplier and/or driver configurations are possible in this clock family and can be requested from the factory FEATURES • XR81101-AA02: Factory configured • One LVCMOS output • Crystal oscillator interface which can also be overdriven using a single-ended reference clock • Output frequency: 125MHz • Crystal/input frequency: 25MHz, parallel resonant crystal • RMS phase jitter @ 125MHz, 1.875MHz - 20MHz: < 150fs • Full 3.3V or 2.5V operating supply • -40°C to 85°C ambient operating temperature • Lead-free (RoHS 6) package APPLICATIONS • Gigabit Ethernet • Low-jitter Clock Generation • Synchronized clock systems Ordering Information – page 8 Typical Application 2.5Vor3.3V 25MHz Enable XR81101 ͲAA02 VCC XTAL_IN Q XTAL_OUT OE VEE -40db 125MHz -60db -80db -100db -120db -140db -160db -180db 100Hz XR81101PHASENOISE(dBc/Hz) RMS Jitter = 123.6fs Int Range 1.875MHz to 20MHz 1KHz 10KHz 100 KHz 1MHz 10MHz © 2014 Exar Corporation 1/8 exar.comXR81101 Rev 1A 1 page Functional Block Diagram XR81101 OE XTAL_IN XTAL_OUT OSC PDF & LPF VCO Divide by M M/N = 5 Divide by N Q Typical Performance Characteristics Figure 1 shows a typical phase noise performance plots for a 125MHz clock output. The data was taken using the industry standard Agilent E5052B phase noise instrument. The integration range is 1.875MHz to 20MHz. © 2014 Exar Corporation Figure 1: 125MHz Operation, Typical Phase Noise at 3.3V 5/8 exar.com/XR81101 Rev 1A 5 Page

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