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PDF KAC-06040 Data sheet ( Hoja de datos )

Número de pieza KAC-06040
Descripción CMOS Image Sensor
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KAC-06040
2832 (H) x 2128 (V)
CMOS Image Sensor
Description
The KAC−06040 Image Sensor is a high-speed 6 megapixel CMOS
image sensor in a 1optical format based on a 4.7 mm 5T CMOS
platform. The image sensor features very fast frame rate, excellent
NIR sensitivity, and flexible readout modes with multiple regions of
interest (ROI). The readout architecture enables use of 8, 4, or 2 LVDS
output banks for full resolution readout of 160 frames per second.
Each LVDS output bank consists of up to 8 differential pairs
operating at 200 MHz DDR for a 400 Mbps data rate per pair.
The pixel architecture allows rolling shutter operation for motion
capture with optimized dynamic range or global shutter for precise
still image capture.
Table 1. GENERAL SPECIFICATIONS
Parameter
Typical Value
Architecture
5T Global Shutter CMOS
Resolution
6 Megapixels
Aspect Ratio
4:3
Pixel Size
Total Number of Pixels
Number of Effective Pixels
Number of Active Pixels
Active Image Size
4.7 mm (H) × 4.7 mm (V)
3024 (H) × 2320 (V)
2848 (H) × 2144 (V)
2832 (H) × 2128 (V)
13.1 mm (H) × 10.0 mm (V)
16.65 mm (diag.), 1Optical Format
Master Clock Input Speed
5 MHz to 50 MHZ
Maximum Pixel Clock Speed
200 MHz DDR LVDS, 400 Mbps
Number of LVDS Outputs
64 Differential Pairs
Number of Output Banks
8, 4, or 2
Frame Rate, 6 MP
Charge Capacity
1−160 fps 10 bits
17,000 electrons
Quantum Efficiency
KAC−06040−CBA
KAC−06040−ABA
Read Noise
(at Maximum LVDS Clock)
40%, 47%, 45% (470, 540, 620 nm)
53%, 15%, 10% (500, 850, 900 nm)
3.4 erms, Rolling Shutter
25 erms, Global Shutter
Dynamic Range
74 dB, Rolling Shutter
57 dB, Global Shutter
Blooming Suppression
> 10,000x
Image Lag
1.6 electron
Digital Core Supply
Analog Core Supply
2.0 V
1.8 V
Pixel Supply
2.8 V & 3.5 V
Power Consumption
Package
2.3 W for 6 Mp @ 160 fps 10 bits
267 Pin Ceramic Micro-PGA
Cover Glass
AR Coated, 2-sides
NOTE: All Parameters are specified at T = 40°C unless otherwise noted.
www.onsemi.com
Figure 1. KAC−06040 CMOS Image Sensor
Features
Global Shutter and Rolling Shutter
Very Fast Frame Rate
High NIR Sensitivity
Multiple Regions of Interest
Interspersed Video Streams
Application
Machine Vision
Intelligent Transportation Systems
Surveillance
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
© Semiconductor Components Industries, LLC, 2016
March, 2016 − Rev. 3
1
Publication Order Number:
KAC−06040/D

1 page




KAC-06040 pdf
KAC−06040
Table 4. PRIMARY PIN DESCRIPTION
Pin
Name
Type
Description
AB09
RESETN
DI Sensor Reset (0 V = Reset State)
E07 CLK_In1
DI Sensor Input Clk_In1 (5−50 MHz)
D08 CLK_In2
DI Sensor Input Clk_In2 (Connect to Clk1)
AB08
TRIGGER
DI Trigger Input (Optional)
AA05
SCLK
DI SPI Master Clock
AA06
CSN
DI SPI Chip Select (0 V = Selected)
AA07
MISO
DO SPI Master Input, Slave Output
AA08
MOSI
DI SPI Master Output, Slave Input
AB05
FB
DO SPI Register Read Feedback
D07 SPI_MS
DI SPI CPOL/CPHA Mode Select
AA14
ADC_Ref1
AO 4.02 kW ±1% Resistor between Ref1 & Ref2
AA15
AB06
ADC_Ref2
FLO
AO 4.02 kW ±1% Resistor between Ref1 & Ref2
DO Flash Output Sync (Optional)
AB07
MSO
DO Mechanical Shutter Output Sync (Optional)
E05 FEN DO Frame Enable Reference Output (Optional)
E06 LEN DO Line Enable Reference Output (Optional)
1. DI = Digital Input, DO = Digital Output, AO = Analog Output.
2. Tie unused DI pins to Ground, No Connect (NC) unused DO pins.
3. By default Clk_In2 should equal Clk_In1 and should be the same source clock.
4. The RESETN pin has a 62 kW internal pull-up resistor, so if left floating the chip will not be in reset mode.
5. The TRIGGER pin has an internal 100 kW pull down resistor. If left floating (and at default polarity) then the sensor state will not be affected
by this pin (i.e. defaults to ‘not triggered’ mode if floated).
6. All of the DI and DO pins nominally operate at 0 V 2.0 V and are associated with the VDD_DIG power supply.
7. The SPI_MS pin has an internal 100 kW pull down resistor. If left floating the CPOL/CHPA will be compatible with CPOL = CPHA = 0 or
CPOL = CPHA = 1.
Table 5. POWER PIN DESCRIPTION
Name
Voltage
Pins
VDD_LVDS
3.3 V D
C04, C05, C23, C24, D04, D24, E04, E24, AA04, AA24,
AB04, AB24, AC04, AC05 AC23, AC24
VDD_DIG
2.0 V D
C18, C19, C20, C21, C22, D18, D19, D20, D21, D22, D23,
E08, E18, E20, E21, E22, AA18, AA20, AA21, AA22, AB18,
AB19, AB20, AB21, AB22, AB23, AC18, AC19, AC20,
AC21, AC22, AB15
AVDD_HV
3.5 V A
C11, D11, E11, AA11, AB11, AC11, C10, D10, E10, AA10,
AB10, AC10
Vref_P
2.8 V A
C13, D13, E13, AA13, AB13, AC13
AVDD_LV
1.8 V A
C17, D16, D17, E17, AA17, AB16, AB17, AC17
Vpixel_low
0 V E09
VSS
No Connect
0 V A02, A14, A26, B14, C03, C06, C12, C14, C25, D03, D12,
D14, D25, E03, E12, E19, E23, E25, AA03, AA12, AA19,
AA23, AA25, AB03, AB12, AB14, AB25, AC03, AC06,
AC12, AC14, AC25, AD14, AE02, AE14, AE26, D15, E15,
AA09
NA A01, E14, E16, C09, D09, D05, D06, AA16, AC09
Description
LVDS Output Supply
Digital Core Supply
Pixel Supply 1
Pixel Supply 2
Analog Low Voltage Supply
Pixel Supply 3. Combine with VSS for
normal operation. Can be pulsed for
Extended Dynamic Range Operation.
Sensor Ground Reference
Unused and test-only pins. These
pins must be floated.
www.onsemi.com
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KAC-06040 arduino
Dark Current vs. Temperature
KAC−06040
NOTE: “Dbl” denotes an approximate doubling temperature for the dark current for the displayed temperature range.
Figure 8. Dark Current vs. Temperature
Power vs. Frame Rate
The most effective method to set the frame rate is to use
vertical blanking (Register 01F1h). Unnecessary chip
operations are suspended during vertical blanking
conserving significant power consumption and also
minimizing the image storage time on the storage node when
in Global Shutter Operation. Tri−scan can reach higher
frame rates, but consumes more power at all frame rates. It
is recommended use Dual−Scan unless the frame rate
required can only be reached with Tri−Scan. The LVDS
clock is 1/2 the PLL2 clock frequency.
Figure 9. Dual−Scan Power vs. Frame Rate, 10 bit Mode
www.onsemi.com
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