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PDF MAX1110 Data sheet ( Hoja de datos )

Número de pieza MAX1110
Descripción Serial 8-Bit ADCs
Fabricantes Maxim Integrated 
Logotipo Maxim Integrated Logotipo



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19-1194; Rev 4; 4/11
EVAALVUAAILTAIOBNLEKIT
+2.7V, Low-Power, Multichannel,
Serial 8-Bit ADCs
General Description
The MAX1110/MAX1111 low-power, 8-bit, 8-channel
analog-to-digital converters (ADCs) feature an internal
track/hold, voltage reference, clock, and serial inter-
face. They operate from a single 2.7V to 5.5V supply
and consume only 85µA while sampling at rates up to
50ksps. The MAX1110’s 8 analog inputs and the
MAX1111’s 4 analog inputs are software-configurable,
allowing unipolar/bipolar and single-ended/differential
operation.
Successive-approximation conversions are performed
using either the internal clock or an external serial-inter-
face clock. The full-scale analog input range is deter-
mined by the 2.048V internal reference, or by an
externally applied reference ranging from 1V to VDD.
The 4-wire serial interface is compatible with the SPI™,
QSPI™, and MICROWIRE™ serial-interface standards.
A serial-strobe output provides the end-of-conversion
signal for interrupt-driven processors.
The MAX1110/MAX1111 have a software-program-
mable, 2µA automatic power-down mode to minimize
power consumption. Using power-down, the supply
current is reduced to 6µA at 1ksps, and only 52µA at
10ksps. Power-down can also be controlled using the
SHDN input pin. Accessing the serial interface automat-
ically powers up the device.
The MAX1110 is available in a 20-pin SSOP package.
The MAX1111 is available in a small 16-pin QSOP
package.
________________________Applications
Portable Data Logging
Hand-Held Measurement Devices
Medical Instruments
System Diagnostics
Solar-Powered Remote Systems
4mA to 20mA-Powered Remote
Data-Acquisition Systems
Pin Configurations appear at end of data sheet.
____________________________Features
o 2.7V to 5.5V Single Supply
o Low Power: 85µA at 50ksps
6µA at 1ksps
o 8-Channel Single-Ended or 4-Channel Differential
Inputs (MAX1110)
o 4-Channel Single-Ended or 2-Channel Differential
Inputs (MAX1111)
o Internal Track/Hold; 50kHz Sampling Rate
o Internal 2.048V Reference
o SPI/QSPI/MICROWIRE-Compatible Serial Interface
o Software-Configurable Unipolar or Bipolar Inputs
o Total Unadjusted Error: ±1 LSB (max)
±0.3 LSB (typ)
Ordering Information appears at end of data sheet.
________________Functional Diagram
CS
SCLK
DIN
SHDN
CH0
CH1
CH2
CH3
CH4*
CH5*
CH6*
CH7*
COM
REFOUT
REFIN
INPUT
SHIFT
REGISTER
CONTROL
LOGIC
INT
CLOCK
ANALOG
INPUT
MUX
T/H
+2.048V
REFERENCE
OUTPUT
SHIFT
REGISTER
CLOCK
IN 8-BIT
SAR ADC
OUT
REF
MAX1110
MAX1111
*MAX1110 ONLY
DOUT
SSTRB
VDD
DGND
AGND
SPI and QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.

1 page




MAX1110 pdf
+2.7V, Low-Power, Multichannel,
Serial 8-Bit ADCs
TIMING CHARACTERISTICS (Figures 8 and 9)
(VDD = 2.7V to 5.5V, TA = TMIN to TMAX, unless otherwise noted.)
PARAMETER
Track/Hold Acquisition Time
DIN to SCLK Setup
DIN to SCLK Hold
SCLK Fall to Output Data Valid
CS Fall to Output Enable
CS Rise to Output Disable
CS to SCLK Rise Setup
CS to SCLK Rise Hold
SCLK Pulse Width High
SCLK Pulse Width Low
SCLK Fall to SSTRB
CS Fall to SSTRB Output Enable
(Note 6)
CS Rise to SSTRB output
Disable (Note 6)
SSTRB Rise to SCLK Rise
(Note 6)
Wake-Up Time
SYMBOL
tACQ
tDS
tDH
tDO
tDV
tTR
tCSS
tCSH
tCH
tCL
t SSTRB
tSDV
tSTR
CONDITIONS
Figure 1, CLOAD = 100pF
Figure 1, CLOAD = 100pF
Figure 2, CLOAD = 100pF
CLOAD = 100pF
Figure 1, external clock mode only,
CLOAD = 100pF
Figure 2, external clock mode only,
CLOAD = 100pF
tSCK Figure 11, internal clock mode only
tWAKE
External reference
Internal reference (Note 11)
MIN TYP MAX UNITS
1 µs
100 ns
0 ns
20 200 ns
240 ns
240 ns
100 ns
0 ns
200 ns
200 ns
240 ns
240 ns
240 ns
0
20
12
ns
µs
ms
Note 1: Relative accuracy is the analog value’s deviation (at any code) from its theoretical value after the full-scale range is calibrated.
Note 2: See Typical Operating Characteristics.
Note 3: VREFIN = 2.048V, offset nulled.
Note 4: On-channel grounded; sine wave applied to all off-channels.
Note 5: Conversion time is defined as the number of clock cycles multiplied by the clock period; clock has 50% duty cycle.
Note 6: Guaranteed by design. Not subject to production testing.
Note 7: Common-mode range for the analog inputs is from AGND to VDD.
Note 8: External load should not change during the conversion for specified accuracy.
Note 9: External reference at 2.048V, full-scale input, 500kHz external clock.
Note 10: Measured as | VFS (2.7V) - VFS (3.6V) |.
Note 11: 1µF at REFOUT; internal reference settling to 0.5 LSB.
_______________________________________________________________________________________ 5

5 Page





MAX1110 arduino
+2.7V, Low-Power, Multichannel,
Serial 8-Bit ADCs
Table 4. Full-Scale and Zero-Scale Voltages
UNIPOLAR MODE
Full Scale
Zero Scale
VREFIN + COM
COM
Positive
Full Scale
+VREFIN/2
+ COM
BIPOLAR MODE
Zero
Scale
COM
Negative
Full Scale
-VREFIN/2
+ COM
in control bytes of $FF (hex), which trigger single-
ended, unipolar conversions on CH7 (MAX1110) or
CH3 (MAX1111) in external clock mode without power-
ing down between conversions. In external clock mode,
the SSTRB output pulses high for two clock periods
before the most significant bit of the 8-bit conversion
result is shifted out of DOUT. Varying the analog input
alters the output code. A total of 10 clock cycles is
required per conversion. All transitions of the SSTRB
and DOUT outputs occur on SCLK’s falling edge.
How to Start a Conversion
A conversion is started by clocking a control byte into
DIN. With CS low, each rising edge on SCLK clocks a bit
from DIN into the MAX1110/MAX1111’s internal shift reg-
ister. After CS falls, the first arriving logic “1” bit at DIN
defines the MSB of the control byte. Until this first start bit
arrives, any number of logic “0” bits can be clocked into
DIN with no effect. Table 3 shows the control-byte format.
The MAX1110/MAX1111 are compatible with MICROWIRE,
SPI, and QSPI devices. For SPI, select the correct clock
polarity and sampling edge in the SPI control registers:
set CPOL = 0 and CPHA = 0. MICROWIRE, SPI, and
QSPI all transmit a byte and receive a byte at the same
time. Using the Typical Operating Circuit (Figure 3), the
simplest software interface requires three 8-bit transfers
to perform a conversion (one 8-bit transfer to configure
the ADC, and two more 8-bit transfers to clock out the
8-bit conversion result). Figure 6 shows the MAX1110/
MAX1111 common serial-interface connections.
0V TO
+2.048V
ANALOG 0.01µF
INPUT
C1
1µF
VDD
DGND
MAX1110
MAX1111
CH7 (CH3)
AGND
CS
COM
REFOUT
REFIN
SCLK
DIN
SSTRB
DOUT
SHDN
0.1µF
+3V
N.C.
+3V
1µF
500kHz
OSCILLATOR
OSCILLOSCOPE
SCLK
SSTRB
DOUT*
CH1 CH2 CH3 CH4
*FULL-SCALE ANALOG INPUT, CONVERSION RESULT = $FF (HEX)
( ) ARE FOR THE MAX1111.
Figure 5. Quick-Look Circuit
______________________________________________________________________________________ 11

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