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PDF BGM15HA12 Data sheet ( Hoja de datos )

Número de pieza BGM15HA12
Descripción High-Band LNA Multiplexer Module
Fabricantes Infineon 
Logotipo Infineon Logotipo



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BGM15HA12
High-Band LNA Multiplexer Module
Data Sheet
Revision 3.0 - 2015-07-24
Power Management & Multimarket

1 page




BGM15HA12 pdf
BGM15HA12 High-Band LNA Multiplexer Module
1 Features
Power gain: 16.3 dB
Low noise figure: 1.2 dB
Low current consumption: 4.9 mA
Frequency range from 2.3 to 2.7 GHz
RF output internally matched to 50
Low external component count
High port-to-port-isolation
Suitable for LTE / LTE-Advanced and 3G applications
No decoupling capacitors required if no DC applied on RF lines
On chip control logic including ESD protection
Supply voltage: 2.2 to 3.3 V
Integrated MIPI RFFE interface operating in 1.1 to 1.95 V voltage
range
Software programmable MIPI RFFE USID
Small form factor 1.1 mm x 1.9 mm
High EMI robustness
RoHS and WEEE compliant package
BGM15HA12
2 Product Description
The BGM15HA12 is a LNA multiplexer module for LTE high-band frequencies that increases the data rate while
keeping flexibility and low footprint. It is a perfect solution for multimode handsets based on LTE-Advanced and
WCDMA. The device configuration is shown in Fig. 12.
Table 1: Ordering Information
Type
BGM15HA12
Package
ATSLP-12-3
Data Sheet
5
Marking
H3
Revision 3.0 - 2015-07-24

5 Page





BGM15HA12 arduino
BGM15HA12
6 MIPI RFFE Specification
All sequences are implemented according to the ’MIPI Alliance Specification for RF Front-End Control Interface’
document version 1.10 - 26. July 2011.
Table 8: MIPI Features
Feature
Register write command sequence
Register read command sequence
Extended register write command sequence
Extended register read command sequence
Register 0 write command sequence
Trigger function
Supported
Yes
Yes
No
No
Yes
Yes
Programmable USID
Yes
Status Register
Reset
Group SID
USID_Sel pin
Full speed write
Half speed read
Full speed read
Yes
Yes
Yes
No
Yes
Yes
Yes
Comment
Up to 4 Bytes
Up to 4 Bytes
Trigger assignment to each control register is sup-
ported
3 register command sequence and extended regis-
ter command sequence
Register for debugging
By VIO, Power Mode and RFFE_STATUS
External pin for changing USID is not implemented
Table 9: Startup Behavior
Feature
Power status
Trigger function
State
LOW POWER
ENABLED
Comment
The chip is in low power mode after startup
Trigger function is enabled after startup. Trigger function can be dis-
abled via PM_TRIG register.
Data Sheet
11 Revision 3.0 - 2015-07-24

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