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PDF DA9061 Data sheet ( Hoja de datos )
| Número de pieza | DA9061 | |
| Descripción | Entry level PMIC | |
| Fabricantes | Dialog Semiconductor | |
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DA9061
Entry level PMIC for applications requiring up to 6 A
General description
DA9061 is a power management integrated circuit (PMIC) optimised for supplying systems with
single- and dual-core processors, I/O, DDR memory, and peripherals. It targets mobile device,
medical equipment, entry level IVI system, and FPGA based applications.
DA9061 features three buck converters providing a total current of 6 A. High efficiency is achieved
over a wide load range by using automatic Pulse Frequency Modulation (PFM) mode. All power
switches are integrated, therefore, external Schottky diodes are not required. Furthermore, low-
profile inductors can be used with DA9061. The four LDO regulators with programmable output
voltage provide up to 300 mA.
Dynamic voltage control (DVC) allows dynamic control of DA9061 supply voltages according to the
operating point of the system. It is controlled by writing directly to the registers using the I2C
compatible 2-wire interface or the GPIOs.
DA9061 features a programmable power sequencer that handles start-up and shutdown sequences.
Power mode transitions can be triggered with software control, GPIOs, or with the on-key. Several
types of on-key presses can be detected to trigger different power mode transitions.
An integrated watchdog timer monitors the system.
Five GPIOs are able to perform system functions, including: keypad supervision, application buck,
and timing-controlled external regulators/power switches or other ICs.
DA9061 is also available as an automotive AEC-Q100 Grade 3 version.
Key features
■ Input voltage 2.8 to 5.5 V
■ Programmable power mode sequencer
■ Three buck converters with dynamic voltage ■ System supply and junction temperature
control:
monitoring
□ Buck1: 0.3 to 1.57 V, 2.5 A
■ Watchdog timer
□ Buck2: 0.8 to 3.34 V, 2 A
■ Five GPIOs
□ Buck3: 0.53 to 1.8 V, 1.5 A
■ -40 to +85 °C temperature range
□ 3 MHz switching frequency (enables low ■ 40-pin QFN, 6×6 mm package, 0.5 mm pitch
profile inductors)
■ Four LDO regulators:
■ Automotive AEC-Q100 Grade 3 variant
available
□ LDO1: 0.9 to 3.6 V, 100 mA
□ LDO2, LDO3, LDO4: 0.9 to 3.6 V, 300 mA
Applications
■ Supply for single and dual core application
processors such as ARM Cortex or i.MX6
series
■ Power supply for entry-level FPGAs
■ Automotive infotainment
■ Portable industrial and medical devices
■ E-book readers
Datasheet
CFR0011-120-00 Rev 5
Revision 3.2
1 of 82
01-Mar-2016
© 2016 Dialog Semiconductor
1 page  
DA9061
Entry level PMIC for applications requiring up to 6 A
A.1.5 System control ..................................................................................................... 57
A.1.6 GPIO control ........................................................................................................ 59
A.1.7 Power supply control ........................................................................................... 62
A.2 PAGE 1 ............................................................................................................................... 67
A.2.1 Power sequencer................................................................................................. 67
A.2.2 Power supply control ........................................................................................... 71
A.3 PAGE 2 ............................................................................................................................... 74
A.3.1 Customer trim and configuration ......................................................................... 74
A.3.2 Customer device specific..................................................................................... 78
Revision history................................................................................................................................. 81
Datasheet
CFR0011-120-00 Rev 5
Revision 3.2
5 of 82
01-Mar-2016
© 2016 Dialog Semiconductor
5 Page 
DA9061
Entry level PMIC for applications requiring up to 6 A
4.2 Watchdog
Unless otherwise noted, the following is valid for TA = -40 to +85 ºC, VSYS = 2.8 to 5.5 V.
Table 6: Watchdog electrical characteristics
Parameter
Symbol
Test conditions
Minimum watchdog time tWDMIN
Internal 25 kHz oscillator
Min Typ Max Unit
200 ms
Maximum watchdog
time
tWDMAX
Internal 25 kHz oscillator
2.5
s
Minimum assert time of
WDKICK
tWDKICKMIN
150 µs
4.3 2-wire interface
Figure 3: 2-wire interface timing
Unless otherwise noted, the following is valid for TA = -40 to +85 ºC, VSYS = 2.8 to 5.5 V.
Table 7: 2-wire interface electrical characteristics
Parameter
Symbol Test conditions
Bus free time
STOP to START
tBUF
Bus line capacitive load
Standard/Fast/Fast+ Mode
CB
SCL clock frequency
fSCL Note 1
Start condition set-up time
tSU_STA
Start condition hold time
tH_STA
SCL low time
tLOW
SCL high time
tHIGH
2-WIRE SCL and SDA rise time tR
(input requirement)
2-WIRE SCL and SDA fall time tF
(input requirement)
Data set-up time
tSU_D
Data hold-time
tH_D
Data valid time
tVD_D
Min Typ Max Unit
0.5 µs
150 pF
0 1000 kHz
0.26 µs
0.26 µs
0.5 µs
0.26 µs
1000
ns
300 ns
50 ns
0 ns
0.45 µs
Datasheet
Revision 3.2
01-Mar-2016
CFR0011-120-00 Rev 5
11 of 82
© 2016 Dialog Semiconductor
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet DA9061.PDF ] | |
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