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Número de pieza DA7202
Descripción 10W Mono Class-D Amplifier
Fabricantes Dialog Semiconductor 
Logotipo Dialog Semiconductor Logotipo



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DA7202
10 W Mono Class-D Amplifier for 2S Battery Devices
Company confidential
General description
DA7202 is a powerful, high efficiency, low EMI Class-D speaker driver that can drive 10 W into 4 Ω
loads directly from a 2S lithium ion battery pack.
DA7202 is a standalone high performance mono Class-D audio amplifier targeted at powering a
variety of two cell portable applications such as Ultrabooks™ and tablets.
It uses a fully-differential switched mode amplifier architecture with a fixed +18 dB gain, with
differential analogue inputs. It also has a PWM modulator and an H-bridged switched power output
stage that delivers 8 W into an 8 Ω load, making a speaker sound louder on portable devices.
The DA7202 can be directly connected between the two-cell battery and the speaker. Noise
suppression circuitry to reduce audible pops and clicks at the speaker output is also included.
Available as a 9-bump WL-CSP package with 0.5 mm pitch that is suited to low cost PCB
technology, it is ideal for portable applications that require small footprints.
Key features
PRMS: 3.8 W into 8 Ω load
at 8.2 V, 1% THD+N
Efficiency: 90% @ POUT = 3.5 W
at 8.2 V, 8 Ω and 85%@POUT = 7.0 W
at 8.2 V, 4
Supports 4 Ω and 8 Ω loads
SNR (A-weighted) 104 dB
THD+N: 90 dB @ 3.0 W, 8.2 V, 8 Ω
PSRR: 78 dB
Auto-Shutdown/Start-up: <3.5 ms
Ultra low standby current: 7 µA
Short-Circuit & Thermal-Overload Protection
with auto recovery
Wide supply voltage range 4.5 to 9.0 V
9-bump WL-CSP with 0.5 mm pitch
2S battery pack
Applications
Tablets
Personal navigation devices
Ultrabooks
Speaker accessories
Handheld gaming devices
Datasheet
CFR0011-120-00 Rev 5
Revision 3a
1 of 25
20-Aug-2015
© 2015 Dialog Semiconductor

1 page




DA7202 pdf
DA7202
10 W Mono Class-D Amplifier for 2S Battery Devices
2 Block diagram
Company confidential
2S Battery Pack
IN_P
IN_N
LDO
Short Circuit / Over-Current
Protection
AUDIO SIGNAL BLOCK
Fixed
+18 dB
RF Noise
Suppression
Pop/Click
Suppression
Class-D
Output Stage
OUT_P
OUT_N
PDN_N
Thermal Shutdown
Power Down
Active
DA7202
Figure 1: DA7202 block diagram
Datasheet
CFR0011-120-00 Rev 5
Revision 3a
5 of 25
20-Aug-2015
© 2015 Dialog Semiconductor

5 Page





DA7202 arduino
DA7202
10 W Mono Class-D Amplifier for 2S Battery Devices
Company confidential
8.4 Gain
The DA7202 has a fixed gain of +18 dB.
Output volume is directly proportional to the input signal strength. It is assumed that any required
variation in output volume will be controlled by varying the DA7202 input signal. The input signal
amplitude can be reduced by the use of resistor dividers in conjunction with the known input
impedance.
8.5 Class D output stage
The class D output stage is connected directly to the PVDD (two cell battery pack) power supply.
High-efficiency operation is achieved by operating the output transistors as switches. The output
power transistors are either fully On or fully Off, providing a minimum resistance path for current from
the power supply to the load. The block’s outputs are connected directly to the speaker at OUT_P
and OUT_N.
Filterless operation is achieved by connecting a load (a speaker) between the output terminals of the
Class D ouput block. As a result, the voltage across the load represents a PWM (Pulse Width
Modulated) audio signal, while the output current in the load is a filtered, demodulated representation
of the input audio signal.
For filterless operation, the speaker load can be considered as a first order output filter with a cut-off
frequency well below the PWM carrier signal (the current in the load is a filtered version of the output
PWM voltage signal). See section 10.2 for further detail on speaker selection.
8.6 Power down (PDN_N)
The DA7202 is powered down by pulling the PDN_N pin low. When the device is powered down, a
controlled shutdown process is performed, thus ensuring that there are no audible artefacts (pops
and clicks) on the output path.
The time to disable the device is illustrated in Figure 16.
Table 7: Actions of the PDN_N pin
PDN_N Value
Description
0 Power Down
1 Active
Datasheet
CFR0011-120-00 Rev 5
Revision 3a
11 of 25
20-Aug-2015
© 2015 Dialog Semiconductor

11 Page







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