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PDF NCP81274 Data sheet ( Hoja de datos )

Número de pieza NCP81274
Descripción 8/7/6/5/4/3/2/1 Phase Buck Controller
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No Preview Available ! NCP81274 Hoja de datos, Descripción, Manual

NCP81274
8/7/6/5/4/3/2/1 Phase Buck
Controller with PWM_VID
and I2C Interface
The NCP81274 is a multiphase synchronous controller optimized
for new generation computing and graphics processors. The device is
capable of driving up to 8 phases and incorporates differential voltage
and phase current sensing, adaptive voltage positioning and
PWM_VID interface to provide and accurately regulated power for
computer or graphic controllers. The integrated power saving
interface (PSI) allows for the processors to set the controller in one of
three modes, i.e. all phases on, dynamic phases shedding or fixed low
phase count mode, to obtain high efficiency in light-load conditions.
The dual edge PWM multiphase architecture ensures fast transient
response and good dynamic current balance.
Features
Compliant with NVIDIA® OVR4+ Specifications
Supports Up to 8 Phases
4.5 V to 20 V Supply Voltage Range
250 kHz to 1.2 MHz Switching Frequency (8 Phase)
Power Good Output
Under Voltage Protection (UVP)
Over Voltage Protection (OVP)
Over Current Protection (OCP)
Per Phase Over Current Protection
Startup into Pre-Charged Loads while Avoiding False OVP
Configurable Adaptive Voltage Positioning (AVP)
High Performance Operational Error Amplifier
True Differential Current Balancing Sense Amplifiers for Each
Phase
Phase-to-Phase Dynamic Current Balancing
Current Mode Dual Edge Modulation for Fast Initial Response to
Transient Loading
Power Saving Interface (PSI)
Automatic Phase Shedding with User Settable Thresholds
PWM_VID and I2C Control Interface
Compact 40 Pin QFN Package (5 × 5 mm Body, 0.4 mm Pitch)
This Device is Pb-Free and is RoHS Compliant
Typical Applications
GPU and CPU Power
Graphic Cards
Desktop and Notebook Applications
www.onsemi.com
1 40
QFN40
CASE 485CR
MARKING DIAGRAM
1
ON
NCP
81274
AWLYYWWG
G
NCP81274 = Specific Device Code
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb-Free Package
(Note: Microdot may be in either location)
PIN CONNECTIONS
REFIN
VREF
VRMP
PWM8/SS
PWM7/OCP
PWM6/LPC1
PWM5/LPC2
PWM4/PHTH1
PWM3/PHTH2
PWM2/PHTH3
1
2
3
4
5
6
7
8
9
10
NCP81274
(TOP VIEW)
Tab: GROUND
30 COMP
29 FB
28 DIFF
27 FSW
26 LLTH/I2C_ADD
25 IOUT
24 ILIM
23 CSCOMP
22 CSSUM
21 CSREF
ORDERING INFORMATION
Device
NCP81274MNTXG
Package
Shipping
QFN40 2500/Tape & Reel
(Pb-Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2015
September, 2016 − Rev. 11
1
Publication Order Number:
NCP81274/D

1 page




NCP81274 pdf
NCP81274
Table 1. PIN FUNCTION DESCRIPTION (continued)
Pin
Number
Pin
Name
Pin
Type
Description
29 FB
I Error amplifier inverting (feedback) input.
30 COMP O Output of the error amplifier and the inverting input of the PWM comparator.
31 VSP
I Differential Output Voltage Sense Positive terminal.
32 VSN
I Differential Output Voltage Sense Negative terminal.
33 VCC
I Power for the internal control circuits. A 1 mF decoupling capacitor is requires from this
pin to ground.
34 SDA I/O Serial Data bi-directional pin, requires pull-up resistor to VCC.
35 SCL
I Serial Bus clock pin, requires pull-up resistor to VCC.
36 EN
I Logic input. Logic high enables regulator output logic low disables regulator output.
37 PSI
I Power Saving Interface control pin. This pin can be set low, high or left floating.
Use a current limiting resistor of 100 kW when driving the pin with 5 V logic.
38 PGOOD O Open Drain power good indicator.
39 PWM_VID
I PWM_VID buffer input.
40 VID_BUFF O PWM_VID pulse output from internal buffer.
41
AGND
GND
Analog ground and thermal pad, connected to system ground.
Table 2. MAXIMUM RATINGS
Rating
Pin Voltage Range (Note 1)
Pin Symbol
VSN
Min
GND−0.3
Typ Max Unit
GND + 0.3
V
VCC
−0.3
6.5 V
VRMP
−0.3
25 V
PWM_VID
−0.3
(−2, < 50 ns)
VCC + 0.3
V
All Other Pins
with the
exception of
the DRON Pin
−0.3
VCC + 0.3
V
Pin Current Range
COMP
−2
2 mA
CSCOMP
DIFF
PGOOD
VSN
−1
1 mA
Moisture Sensitivity Level
MSL
1−
Lead Temperature Soldering Reflow (SMD Styles Only),
Pb-Free Versions (Note 2)
TSLD
260 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. All signals referenced to GND unless noted otherwise.
2. For information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
5

5 Page





NCP81274 arduino
NCP81274
VID_BUFF VREF
VCC
EN
PWM_VID
DIFFOUT
PGOOD
REFIN
FB
COMP
SDA
SCL
FSW
VRMP
PSI
REF
PGOOD
Comparator
EN
VSP
VSN
UVLO & EN
EN
+
1.3V
S
S
LLTH
VSP
VSN
Soft start LLTH
CSCOMP
1.3V
Mux
OVP
OVP
PSI OCP
VSP
VSN
+
Total Output Current
Measurment , ILIM & OCP
CSREF
CSSUM
ILIM
IOUT
Data
Registers
Control
Interface
Ramp
Generators
Ramp1
Ramp2
Ramp3
Ramp4
Ramp5
Ramp6
Ramp7
Ramp8
IPH1
IPH2
IPH3
IPH4
IPH5
IPH6
IPH7
IPH8
Current Balance
Amplifiers
and
per Phase OCP
Comparators
PWM
Generators
Power State
Stage
GND LLTH/I2C_ADD
Figure 5. NCP81274 Functional Block Diagram
www.onsemi.com
11
CSP1
CSP2
CSP3
CSP4
CSP5
CSP6
CSP7
CSP8
PWM1/PHTH4
PWM2/PHTH3
PWM3/PHTH2
PWM4/PHTH1
PWM5/LPC2
PWM6/LPC1
PWM7/OCP
PWM8/SS
DRON

11 Page







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