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Número de pieza | UT54ACS86 | |
Descripción | Quadruple 2-Input Exclusive OR Gates | |
Fabricantes | Aeroflex Circuit Technology | |
Logotipo | ||
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UT54ACS86/UT54ACTS86
Quadruple 2-Input Exclusive OR Gates
Datasheet
November 2010
www.aeroflex.com/logic
FEATURES
1.2μ CMOS
- Latchup immune
High speed
Low power consumption
Single 5 volt supply
Available QML Q or V processes
Flexible package
- 14-pin DIP
- 14-lead flatpack
UT54ACS86 - SMD 5962-96538
UT54ACTS86 - SMD 5962-96539
DESCRIPTION
The UT54ACS86 and the UT54ACTS86 are quadruple 2-input
exclusive OR gates. The devices perform the Boolean function
Y = A⊕B = AB + AB in positive logic.
An application is as a true/complement element. If one of the
inputs is low, the other input will be reproduced in true form at
the output. If one of the inputs is high, the signal on the other
input will be reproduced inverted at the output.
The devices are characterized over full military temperature
range of -55°C to +125°C.
FUNCTION TABLE
INPUTS
AB
LL
LH
HL
HH
OUTPUT
Y
L
H
H
L
LOGIC SYMBOL
(1)
A1
(2)
B1
(4)
A2
(5)
B2
(9)
A3
(10)
B3
(12)
A4
(13)
B4
=1 (3)
Y1
(6)
Y2
(8)
Y3
(11)
Y4
Note:
1. Logic symbol in accordance with ANSI/IEEE standard 91-1984 and IEC
Publication 617-12.
PINOUTS
A1
B1
Y1
A2
B2
Y2
VSS
14-Pin DIP
Top View
A1 1 14 VDD
B1 2 13 B4
Y1 3 12 A4
A2 4 11 Y4
B2 5 10 B3
Y2 6
9 A3
VSS 7
8 Y3
14-Lead Flatpack
Top View
1 14
2 13
3 12
4 11
5 10
69
78
LOGIC DIAGRAM
A1
B1
A2
B2
A3
B3
A4
B4
Y1
Y2
Y3
Y4
1
VDD
B4
A4
Y4
B3
A3
Y3
1 page AC ELECTRICAL CHARACTERISTICS 2
(VDD = 5.0V ±10%; VSS = 0V 1, -55°C < TC < +125°C); Unless otherwise noted, Tc is per the temperature range ordered.
SYMBOL
PARAMETER
MINIMUM
MAXIMUM
UNIT
tPHL Data to input
tPLH Data to input
1 14 ns
1 13 ns
Notes:
1. Maximum allowable relative shift equals 50mV.
2. All specifications valid for radiation dose ≤ 1E6 rads(Si).
5
5 Page |
Páginas | Total 9 Páginas | |
PDF Descargar | [ Datasheet UT54ACS86.PDF ] |
Número de pieza | Descripción | Fabricantes |
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