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PDF SSM2603 Data sheet ( Hoja de datos )

Número de pieza SSM2603
Descripción Low Power Audio Codec
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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Data Sheet
Low Power Audio Codec
SSM2603
FEATURES
GENERAL DESCRIPTION
Stereo, 24-bit analog-to-digital and digital-to-analog converters
DAC SNR: 100 dB (A-weighted), THD: −80 dB at 48 kHz, 3.3 V
ADC SNR: 90 dB (A-weighted), THD: −80 dB at 48 kHz, 3.3 V
Highly efficient headphone amplifier
Stereo line input and monaural microphone input
Low power
7 mW stereo playback (1.8 V/1.5 V supplies)
14 mW record and playback (1.8 V/1.5 V supplies)
Low supply voltages
Analog: 1.8 V to 3.6 V
Digital core: 1.5 V to 3.6 V
Digital I/O: 1.8 V to 3.6 V
256/384 oversampling rate in normal mode; 250/272 over-
sampling rate in USB mode
Audio sampling rates: 8 kHz, 11.025 kHz, 12 kHz, 16 kHz,
22.05 kHz, 24 kHz, 32 kHz, 44.1 kHz, 48 kHz, 88.2 kHz,
and 96 kHz
28-lead, 5 mm × 5 mm LFCSP (QFN) package
APPLICATIONS
Mobile phones
MP3 players
Portable gaming
Portable electronics
Educational toys
The SSM2603 is a low power, high quality stereo audio codec
for portable digital audio applications with one set of stereo
programmable gain amplifier (PGA) line inputs and one
monaural microphone input. It features two 24-bit analog-to-
digital converter (ADC) channels and two 24-bit digital-to-
analog (DAC) converter channels.
The SSM2603 can operate as a master or a slave. It supports
various master clock frequencies, including 12 MHz or 24 MHz
for USB devices; standard 256 fS or 384 fS based rates, such as
12.288 MHz and 24.576 MHz; and many common audio sampling
rates, such as 96 kHz, 88.2 kHz, 48 kHz, 44.1 kHz, 32 kHz, 24
kHz, 22.05 kHz, 16 kHz, 12 kHz, 11.025 kHz, and 8 kHz.
The SSM2603 can operate at power supplies as low as 1.8 V for
the analog circuitry and as low as 1.5 V for the digital circuitry.
The maximum voltage supply is 3.6 V for all supplies.
The SSM2603 software-programmable stereo output options
provide the user with many application possibilities. Its volume
control functions provide a large range of gain control of the
audio signal.
The SSM2603 is specified over the industrial temperature range
of −40°C to +85°C. It is available in a 28-lead, 5 mm × 5 mm
lead frame chip scale package (LFCSP).
FUNCTIONAL BLOCK DIAGRAM
AVDD VMID AGND
DBVDD DGND DCVDD
HPVDD PGND
MICBIAS
–34.5dB TO +33dB,
1.5dB STEP
RLINEIN
MUX
MICIN
0dB/20dB BOOST
LLINEIN
–34.5dB TO +33dB,
1.5dB STEP
MUX
BYPASS
SIDETONE
–6dB TO –15dB/MUTE –3dB STEP
ADC
DIGITAL
PROCESSOR
ADC
DAC
DAC
–6dB TO –15dB/MUTE –3dB STEP
SIDETONE
BYPASS
SSM2603
–73dB TO +6dB,
1dB STEP
RHPOUT
ROUT
LOUT
LHPOUT
–73dB TO +6dB,
1dB STEP
CLK
DIGITAL AUDIO INTERFACE
CONTROL INTERFACE
MCLK/ XTO CLKOUT
XTI
PBDAT RECDAT BCLK PBLRC RECLRC MUTE CSB SDIN SCLK
Figure 1.
Rev. C
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2008–2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com

1 page




SSM2603 pdf
SSM2603
Parameter
HEADPHONE OUTPUT
Full-Scale Output Voltage
Maximum Output Power
Signal-to-Noise Ratio (A-Weighted)
THD + N
Power Supply Rejection Ratio
Mute Attenuation
LINE INPUT TO LINE OUTPUT
Full-Scale Output Voltage
Signal-to-Noise Ratio (A-Weighted)
THD + N
Power Supply Rejection
MICROPHONE INPUT TO HEADPHONE OUTPUT
Full-Scale Output Voltage
Signal-to-Noise Ratio (A-Weighted)
Power Supply Rejection Ratio
Programmable Attenuation
Gain Step
Mute Attenuation
Min Typ
1 × AVDD/3.3
30
60
85 96
90
−65
−60
50
80
1 × AVDD/3.3
92
86
−80
−80
50
1 × AVDD/3.3
94
88
50
6
3
80
1 The line output is tested by sending a −1 dBFS input from the DAC to the line output.
Max
15
Unit
V rms
mW
mW
dB
dB
dB
dB
dB
dB
V rms
dB
dB
dB
dB
dB
V rms
dB
dB
dB
dB
dB
dB
Conditions
RL = 32 Ω
RL = 16 Ω
AVDD = 3.3 V
AVDD = 1.8 V
POUT = 10 mW
POUT = 20 mW
AVDD = 3.3 V
AVDD = 1.8 V
AVDD = 3.3 V
AVDD = 1.8 V
AVDD = 3.3 V
AVDD = 1.8 V
DIGITAL FILTER CHARACTERISTICS
Table 2.
Parameter
ADC FILTER
Pass Band
Min
0
Pass-Band Ripple
Stop Band
Stop-Band Attenuation
High-Pass Filter Corner Frequency
0.555 fS
−61
DAC FILTER
Pass Band
Pass-Band Ripple
Stop Band
Stop-Band Attenuation
MASTER CLOCK TOLERANCE1
Frequency Range
Jitter Tolerance
1 CLKDIV2 bit (Register R8, Bit D6) is set to 0.
0
0.555 fS
−61
8.0
Typ
0.5 fS
3.7
10.4
21.6
0.5 fS
50
Max
0.445 fS
±0.04
0.445 fS
±0.04
18.5
Unit
Hz
Hz
dB
Hz
dB
Hz
Hz
Hz
Hz
Hz
dB
Hz
dB
MHz
ps
Conditions
±0.04 dB
−6 dB
f > 0.567 fS
−3 dB
−0.5 dB
−0.1 dB
±0.04 dB
−6 dB
f > 0.565 fS
Data Sheet
Rev. C | Page 4 of 32

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SSM2603 arduino
SSM2603
DIGITAL DE-EMPHASIS
0
−1
−2
−3
−4
−5
−6
−7
−8
−9
−10
0 4 8 12 16
FREQUENCY (kHz)
Figure 11. De-Emphasis Frequency Response, Audio Sampling Rate = 32 kHz
0.4
0.3
0.2
0.1
0
−0.1
−0.2
−0.3
−0.4
0 4 8 12 16
FREQUENCY (kHz)
Figure 12. De-Emphasis Error, Audio Sampling Rate = 32 kHz
0
−1
−2
−3
−4
−5
−6
−7
−8
−9
−10
0 4 8 12 16 20
FREQUENCY (kHz)
Figure 13. De-Emphasis Frequency Response, Audio Sampling Rate = 44.1 kHz
Data Sheet
0.4
0.3
0.2
0.1
0
−0.1
−0.2
−0.3
−0.4
0 4 8 12 16 20
FREQUENCY (kHz)
Figure 14. De-Emphasis Error, Audio Sampling Rate = 44.1 kHz
0
−1
−2
−3
−4
−5
−6
−7
−8
−9
−10
0 4 8 12 16 20 24
FREQUENCY (kHz)
Figure 15. De-Emphasis Frequency Response, Audio Sampling Rate = 48 kHz
0.4
0.3
0.2
0.1
0
−0.1
−0.2
−0.3
−0.4
0 4 8 12 16 20 24
FREQUENCY (kHz)
Figure 16. De-Emphasis Error, Audio Sampling Rate = 48 kHz
Rev. C | Page 10 of 32

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