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PDF CAP1203 Data sheet ( Hoja de datos )
| Número de pieza | CAP1203 | |
| Descripción | 3-Channel Capacitive Touch Sensor | |
| Fabricantes | Microchip | |
| Logotipo |  |
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CAP1203
3-Channel Capacitive Touch Sensor
General Description
The CAP1203 is a multiple channel capacitive touch
sensor controller. It contains individual capacitive touch
sensor inputs with programmable sensitivity for use in
touch sensor applications. Each sensor input is cali-
brated to compensate for system parasitic capacitance
and automatically recalibrated to compensate for grad-
ual environmental changes.
The CAP1203 includes Multiple Pattern Touch recogni-
tion that allows the user to select a specific set of but-
tons to be touched simultaneously. If this pattern is
detected, a status bit is set and an interrupt is gener-
ated.
The CAP1203 has Active and Standby states, each
with its own sensor input configuration controls. Power
consumption in the Standby state is dependent on the
number of sensor inputs enabled as well as averaging,
sampling time, and cycle time. Deep Sleep is the low-
est power state available, drawing 5µA (typical) of cur-
rent. In this state, no sensor inputs are active, and
communications will wake the device.
Applications
• Desktop and Notebook PCs
• LCD Monitors
• Consumer Electronics
• Appliances
Features
• Three (3) Capacitive Touch Sensor Inputs
- Programmable sensitivity
- Automatic recalibration
- Calibrates for parasitic capacitance
- Individual thresholds for each button
• Multiple Button Pattern Detection
• Power Button Support
• Press and Hold Feature for Volume-like Applica-
tions
• 3.3V or 5V Supply
• Analog Filtering for System Noise Sources
• RF Detection and Avoidance Filters
• Digital EMI Blocker
• 8kV ESD Rating on All Pins (HBM)
• Low Power Operation
- 5µA quiescent current in Deep Sleep
- 50µA quiescent current in Standby (1 sensor
input monitored)
- Samples one or more channels in Standby
• SMBus / I2C Compliant Communication Interface
• Available in an 8-pin 2mm x 3mm TDFN RoHS
compliant package
• Available in an 8-pin SOIC RoHS compliant pack-
age
2013-2015 Microchip Technology Inc.
DS00001572B-page 1
1 page  
TABLE 1-1: PIN DESCRIPTION FOR CAP1203
QFN Pin SOIC Pin
##
11
22
33
44
55
66
Pin
Name
Pin Function
ALERT#
SMDATA
SMCLK
VDD
GND
CS3
ALERT# - Active low alert / interrupt output
for SMBus alert
SMDATA - Bi-directional, open-drain SMBus
or I2C data - requires pull-up resistor
SMCLK - SMBus or I2C clock input - requires
pull-up resistor
Positive Power supply
Ground
Capacitive Touch Sensor Input 3
Pin Type
OD
DIOD
DI
Power
Power
AIO
7 7 CS2 Capacitive Touch Sensor Input 2
AIO
8 8 CS1 Capacitive Touch Sensor Input 1
AIO
Bottom
pad
-
Exposed Not internally connected, but recommend
pad grounding
-
Unused
Connection
Connect to
Ground
n/a
n/a
n/a
n/a
Connect to
Ground
Connect to
Ground
Connect to
Ground
-
APPLICATION NOTE: All digital pins are 5V tolerant pins.
The pin types are described in Table 1-2, "Pin Types".
TABLE 1-2: PIN TYPES
Pin Type
Power
DI
AIO
DIOD
OD
Description
This pin is used to supply power or ground to the device.
Digital Input - This pin is used as a digital input. This pin is 5V tolerant.
Analog Input / Output - This pin is used as an I/O for analog signals.
Digital Input / Open Drain Output - This pin is used as a digital I/O. When it is used as an
output, it is open drain and requires a pull-up resistor. This pin is 5V tolerant.
Open Drain Digital Output - This pin is used as a digital output. It is open drain and requires
a pull-up resistor. This pin is 5V tolerant.
2013-2015 Microchip Technology Inc.
DS00001572B-page 5
5 Page 
TABLE 3-3: READ BYTE PROTOCOL
Start
1->0
Slave Address WR ACK
Register
Address
0101_000 0
0
XXh
ACK
Start
0 1 ->0
Client Address RD
0101_000 1
ACK
Register
Data
0 XXh
NACK Stop
1 0 -> 1
3.3.3 SMBUS SEND BYTE
The Send Byte protocol is used to set the internal address register pointer to the correct address location. No data is
transferred during the Send Byte protocol as shown in Table 3-4.
APPLICATION NOTE: The Send Byte protocol is not functional in Deep Sleep (i.e., DSLEEP bit is set).
TABLE 3-4:
Start
1 -> 0
SEND BYTE PROTOCOL
Slave Address
0101_000
WR
0
ACK
0
Register Address
XXh
ACK
0
Stop
0 -> 1
3.3.4 SMBUS RECEIVE BYTE
The Receive Byte protocol is used to read data from a register when the internal register address pointer is known to
be at the right location (e.g. set via Send Byte). This is used for consecutive reads of the same register as shown in
Table 3-5.
APPLICATION NOTE: The Receive Byte protocol is not functional in Deep Sleep (i.e., DSLEEP bit is set).
TABLE 3-5:
Start
1 -> 0
RECEIVE BYTE PROTOCOL
Slave Address
0101_000
RD
1
ACK
0
Register Data
XXh
NACK
1
Stop
0 -> 1
3.4 I2C Protocols
The CAP1203 supports I2C Block Read and Block Write.
The protocols listed below use the convention in Table 3-1.
3.4.1 BLOCK READ
The Block Read is used to read multiple data bytes from a group of contiguous registers as shown in Table 3-6.
APPLICATION NOTE: When using the Block Read protocol, the internal address pointer will be automatically
incremented after every data byte is received. It will wrap from FFh to 00h.
TABLE 3-6: BLOCK READ PROTOCOL
Start
1->0
ACK
Slave
Address
0101_000
REGISTER
DATA
WR
0
ACK
ACK
0
REGISTER
DATA
Register
Address
XXh
ACK
ACK
Start
Slave Address
RD
ACK
Register Data
0
REGISTER
DATA
1 ->0
ACK
0101_000
...
1
REGISTER
DATA
0
NACK
XXh
STOP
2013-2015 Microchip Technology Inc.
DS00001572B-page 11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet CAP1203.PDF ] | |
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