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PDF UT699 Data sheet ( Hoja de datos )

Número de pieza UT699
Descripción 32-bit Fault-Tolerant SPARC V8/LEON 3FT Processor
Fabricantes Aeroflex Circuit Technology 
Logotipo Aeroflex Circuit Technology Logotipo



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No Preview Available ! UT699 Hoja de datos, Descripción, Manual

Standard Products
UT699 32-bit Fault-Tolerant
SPARCTM V8/LEON 3FT Processor
Data Sheet
July, 2013
FEATURES
Implemented on a 0.25mCMOS technology
Flexible static design allows up to 66MHz clock rate
89 DMIPS throughput via 66MHz base clock frequency
Internally configured clock network
On-board programmable timers and interrupt controllers
High-performance fully pipelined IEEE-754 FPU
Power saving 2.5V core power supply
3.3V I/O compatibility
Hardened-by-design flip-flops and memory cells
Separate instruction and data cache architecture
10/100 Base-T Ethernet port for VxWorks development
Integrated PCI 2.2 compatible core
Four integrated multi-protocol SpaceWire nodes with two
supporting the RMAP protocol
Two CAN-compliant 2.0 bus interfaces
Multifunctional memory controller
-40oC to +105oC operating case temperature range
Operational environment:
- Intrinsic total-dose: 100 krad(Si) and 300 krad(Si)
- SEL Immune >108 MeV-cm2/mg
Packaging options:
- 352-pin Ceramic Quad Flatpack, weight 31.5 grams
- 484-pin Ceramic Land Grid, Column Grid and Ball
Grid Array packages
Standard Microcircuit Drawing 5962-08228
- QML Q and V
Applications
- Nuclear power plant controls
- Critical transportation systems
- High-altitude avionics
- Medical electronics
- X-Ray cargo scanning
INTRODUCTION
The UT699 is a pipelined monolithic, high-performance, fault-
tolerant SPARCTM V8/LEON 3FT Processor. The UT699
provides a 32-bit master/target PCI interface, including a 16 bit
user I/O interface for off-chip peripherals. A compliant 2.0
AMBA bus interface integrates the on-chip LEON 3FT,
SpaceWire, Ethernet, memory controller, cPCI, CAN bus, and
programmable interrupt peripherals.
The UT699 is SPARC V8 compliant; compilers and kernels for
SPARC V8 can therefore be used industry standard
development tools. A full software development suite is
available including a C/C++ cross-compiler system based on
GCC and the Newlib embedded C-library.
BCC includes a small run-time kernel with interrupt support
and Pthreads library. For multi-threaded applications, a
SPARCTM compliant port of the eCos real-time kernel, RTEMS
4.6.5, and VxWorks 6.x is supported.
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UT699 pdf
Pin Name
DATA[7]
DATA[8]
DATA[9]
DATA[10]
DATA[11]
DATA[12]
DATA[13]
DATA[14]
DATA[15]
DATA[16]
DATA[17]
DATA[18]
DATA[19]
DATA[20]
DATA[21]
DATA[22]
DATA[23]
DATA[24]
DATA[25]
DATA[26]
DATA[27]
DATA[28]
DATA[29]
DATA[30]
DATA[31]
Direction
Pin Number
352 CQFP 484 CLGA
I/O 52 AA14
I/O 53 Y13
I/O 57 W15
I/O 58 AB15
I/O 59 Y14
I/O 60 AB14
I/O 62 W16
I/O 63 AA18
I/O 64 Y15
I/O 66 AB16
I/O 67 AA15
I/O 68 AB17
I/O 69 AA16
I/O 71 AA19
I/O 72 W17
I/O 73 AB18
I/O 74 Y16
I/O 78 Y17
I/O 79 AA17
I/O 80 W18
I/O 81 AB19
I/O 83 Y19
I/O 84 AB20
I/O 85 Y18
I/O 86 AA20
Reset
Value
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
Description
Bit 7 of the data bus
Bit 8 of the data bus
Bit 9 of the data bus
Bit 10 of the data bus
Bit 11 of the data bus
Bit 12 of the data bus
Bit 13 of the data bus
Bit 14 of the data bus
Bit 15 of the data bus
Bit 16 of the data bus
Bit 17 of the data bus
Bit 18 of the data bus
Bit 19 of the data bus
Bit 20 of the data bus
Bit 21 of the data bus
Bit 22 of the data bus
Bit 23 of the data bus
Bit 24 of the data bus
Bit 25 of the data bus
Bit 26 of the data bus
Bit 27 of the data bus
Bit 28 of the data bus
Bit 29 of the data bus
Bit 30 of the data bus
Bit 31 of the data bus
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UT699 arduino
Pin Name
PCI_AD[1]
PCI_AD[2]
PCI_AD[3]
PCI_AD[4]
PCI_AD[5]
PCI_AD[6]
PCI_AD[7]
PCI_AD[8]
PCI_AD[9]
PCI_AD[10]
PCI_AD[11]
PCI_AD[12]
PCI_AD[13]
PCI_AD[14]
PCI_AD[15]
PCI_AD[16]
PCI_AD[17]
PCI_AD[18]
PCI_AD[19]
PCI_AD[20]
PCI_AD[21]
PCI_AD[22]
PCI_AD[23]
PCI_AD[24]
PCI_AD[25]
PCI_AD[26]
PCI_AD[27]
PCI_AD[28]
PCI_AD[29]
PCI_AD[30]
Direction
Pin Number
352 CQFP 484 CLGA
PCI-I/O
267
AA3
PCI-I/O
268
Y1
PCI-I/O
269
Y2
PCI-I/O
270
Y3
PCI-I/O
272
W1
PCI-I/O
273
W2
PCI-I/O
274
W3
PCI-I/O
279
V2
PCI-I/O
280
V3
PCI-I/O
281
U1
PCI-I/O
284
U2
PCI-I/O
285
U3
PCI-I/O
286
T1
PCI-I/O
287
R2
PCI-I/O
288
R1
PCI-I/O
305
J1
PCI-I/O
306
K2
PCI-I/O
307
K1
PCI-I/O
308
G1
PCI-I/O
309
H3
PCI-I/O
310
H2
PCI-I/O
312
F1
PCI-I/O
313
F2
PCI-I/O
317
E1
PCI-I/O
318
E2
PCI-I/O
321
F3
PCI-I/O
322
D1
PCI-I/O
323
D2
PCI-I/O
324
E3
PCI-I/O
326
D3
Reset
Value
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
high-Z
Description
Bit 1 of PCI address and data bus
Bit 2 of PCI address and data bus
Bit 3 of PCI address and data bus
Bit 4 of PCI address and data bus
Bit 5 of PCI address and data bus
Bit 6 of PCI address and data bus
Bit 7 of PCI address and data bus
Bit 8 of PCI address and data bus
Bit 9 of PCI address and data bus
Bit 10 of PCI address and data bus
Bit 11 of PCI address and data bus
Bit 12 of PCI address and data bus
Bit 13 of PCI address and data bus
Bit 14 of PCI address and data bus
Bit 15 of PCI address and data bus
Bit 16 of PCI address and data bus
Bit 17 of PCI address and data bus
Bit 18 of PCI address and data bus
Bit 19 of PCI address and data bus
Bit 20 of PCI address and data bus
Bit 21 of PCI address and data bus
Bit 22 of PCI address and data bus
Bit 23 of PCI address and data bus
Bit 24 of PCI address and data bus
Bit 25 of PCI address and data bus
Bit 26 of PCI address and data bus
Bit 27 of PCI address and data bus
Bit 28 of PCI address and data bus
Bit 29 of PCI address and data bus
Bit 30 of PCI address and data bus
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