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PDF 74HC4002PW-Q100 Datasheet ( Hoja de datos )

Número de pieza 74HC4002PW-Q100
Descripción Dual 4-input NOR gate
Fabricantes NXP 
Logotipo NXP Logotipo



Total 14 Páginas
		
74HC4002PW-Q100 Hoja de datos, Descripción, Manual
74HC4002-Q100; 74HCT4002-Q100
Dual 4-input NOR gate
Rev. 1 — 18 July 2012
Product data sheet
1. General description
The 74HC4002-Q100; 74HCT4002-Q100 is a dual 4-input NOR gate. Inputs also include
clamp diodes, this enables the use of current limiting resistors to interface inputs to
voltages in excess of VCC.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from 40 C to +85 C and from 40 C to +125 C
Complies with JEDEC standard JESD7A
Low-power dissipation
Input levels:
For 74HC4002-Q100: CMOS level
For 74HCT4002-Q100: TTL level
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
Multiple package options
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
74HC4002D-Q100 40 C to +125 C
74HCT4002D-Q100
SO14
plastic small outline package; 14 leads; body width
3.9 mm
74HC4002PW-Q100 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
Version
SOT108-1
SOT402-1

1 page

74HC4002PW-Q100 pdf
NXP Semiconductors
74HC4002-Q100; 74HCT4002-Q100
Dual 4-input NOR gate
Table 6. Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
25 C
40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max Min Max
CI input
capacitance
- 3.5 -
-
-
-
- pF
74HCT4002-Q100
VIH HIGH-level VCC = 4.5 V to 5.5 V
input voltage
2.0 1.6 -
2.0
-
2.0
-V
VIL LOW-level VCC = 4.5 V to 5.5 V
input voltage
- 1.2 0.8
-
0.8
-
0.8 V
VOH
VOL
II
ICC
ICC
CI
HIGH-level
output voltage
LOW-level
output voltage
input leakage
current
supply current
additional
supply current
input
capacitance
VI = VIH or VIL; VCC = 4.5 V
IO = 20 A
IO = 4.0 mA
VI = VIH or VIL; VCC = 4.5 V
IO = 20 A
IO = 5.2 mA
VI = VCC or GND;
VCC = 5.5 V
VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
per input pin;
VI = VCC 2.1 V; IO = 0 A;
other inputs at VCC or GND;
VCC = 4.5 V to 5.5 V
4.4
3.84
-
-
-
-
-
-
4.5
4.32
0
0.15
-
-
45
3.5
-
-
0.1
0.26
0.1
2
162
-
4.4
3.84
-
-
-
-
-
-
-
-
0.1
0.33
1
20
203
-
4.4
3.7
-
-
-
-
-
-
-V
-V
0.1 V
0.4 V
1 A
40 A
221 A
- pF
74HC_HCT4002_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 July 2012
© NXP B.V. 2012. All rights reserved.
5 of 14

5 Page

74HC4002PW-Q100 arduino
NXP Semiconductors
74HC4002-Q100; 74HCT4002-Q100
Dual 4-input NOR gate
13. Abbreviations
Table 10. Abbreviations
Acronym
Description
CMOS
Complementary Metal Oxide Semiconductor
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
MM Machine Model
TTL Transistor-Transistor Logic
MIL Military
14. Revision history
Table 11. Revision history
Document ID
Release date
74HC_HCT4002_Q100 v.1 20120718
Data sheet status
Product data sheet
Change notice
-
Supersedes
-
74HC_HCT4002_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 July 2012
© NXP B.V. 2012. All rights reserved.
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