DataSheet.es


PDF CH7002D Datasheet ( Hoja de datos )

Número de pieza CH7002D
Descripción Scalable VGA to NTSC/PAL Encoder
Fabricantes ETC 
Logotipo ETC Logotipo
Vista previa
Total 36 Páginas
		
CH7002D datasheet

1 Page

CH7002D pdf
CHRONTEL
CH7002D
Table 1. Pin Description (continued)
44-Pin
PLCC
36
38
41
43
19, 20
Type
In
In
In
In
NC
Symbol
Description
ADDR/FF0
PMODE
VREF2
VREF1
NC
I2C Address Select/Flicker Filter (bit 0)(internal pull-up)
The function of this dual use pin is determined by the state of the PMODE pin.
When the PMODE pin is kept high (default), this pin becomes ADDR or I2C
Address Select, which corresponds to bits 1 and 0 of the I2C device address
(see the I2C Control Port Operation section for details), creating an address
selection as follows:
ADDR I2C Address Selected
1 1110101 = 75H = 117
0 1110110 = 76H = 118
When the PMODE pin is pulled low, this pin becomes FF0 or Flicker Filter
select, the function of which corresponds to bit 0 of the Flicker Filter register,
which selects between the following:
FF0 Flicker Filter Mode
0 0:1:0 No filtering
1 1:2:1 Moderate filtering (default)
This pin-programming is “mux-ed” with the Flicker Filter register (bit 0). All
related modes are described under the Registers and Programming section.
Programming Mode (internal pull-up)
The PMODE pin selects between the two alternative programming modes for
the CH7002, which in turn alters the function of five additional pins
(RESET/DM0, SD/DM1, SC/DM2, XCLK/SD3, and ADDR/FF0). When
PMODE is kept high (default), the chip is placed in I2C programming mode.
When PMODE is pulled low, the chip is placed in direct pin programming
mode.
Internal Voltage Reference
VREF2 provides a typical 2.5V reference that is used as an internal bias to
the ADCs. A 0.1 µF decoupling capacitor should be connected between
VREF2 and ground.
ADC Voltage Reference Input / Output
VREF1 provides a typical 1.235V reference that sets the RGB input full scale
at 0.75V. A 0.1 µF decoupling capacitor should be connected between
VREF1 and ground. VREF1 may also be forced by external reference, where
(VFS is the full scale input voltage):
VFS ~ VREF1 * 0.75/1.235
No Connect
Note: For complete information concerning external signal connections, terminations, and system design considerations,
refer to the Application Information section.
201-0000-029 Rev 6.1, 8/2/99
5

5 Page

CH7002D arduino
CHRONTEL
CH7002D
0
-1
-2
-3
-4
dB -5
-6
-7
-8
-9
-10
0 1 2 3 4 56
Freq (MHz)
Figure 6: Luminance Frequency Response - Detailed View
Y_SV0
Y_SV1
Y_SV2
Y_CVO
Y_CV1
0
-10
-20
dB
-30
-40
01
23 4 5 6
7 8 9 10 11 12
Y_SV0
Y_SV1
Y_SV2
Y_CVO
Y_CV1
Freq (MHz)
Figure 7: Luminance Frequency Response - Full View
Notes:
1 The curves shown are valid for operating modes 2 and 6. Mode 0 frequency values are 20% higher, mode 1
and 3 frequency values are 12% higher, and mode 4 frequency values are 1% lower, due to changes in clock
frequencies.
2 The Y_SV1 and Y_CV0 responses are identical; therefore the curves lie on top of each other.
201-0000-029 Rev 6.1, 8/2/99
11

11 Page





PáginasTotal 36 Páginas
PDF Descargar[ CH7002D.PDF ]

Enlace url


Hoja de datos destacado

Número de piezaDescripciónFabricantes
CH7002DScalable VGA to NTSC/PAL EncoderETC
ETC
CH7002D-VScalable VGA to NTSC/PAL EncoderETC
ETC

Número de piezaDescripciónFabricantes
SLA6805M

High Voltage 3 phase Motor Driver IC.

Sanken
Sanken
SDC1742

12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.

Analog Devices
Analog Devices


DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.


Index : 0  1  2  3  4  5  6  7  8  9  A  B  C  D  E  F  G  H  I  J  K  L  M  N  O  P  Q  R  S  T  U  V  W  X  Y  Z


www.DataSheet.es    |   2018   |  Privacy Policy  |  Contacto  |  Buscar