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PDF XRA1405 Data sheet ( Hoja de datos )

Número de pieza XRA1405
Descripción 16-BIT SPI GPIO EXPANDER
Fabricantes Exar 
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No Preview Available ! XRA1405 Hoja de datos, Descripción, Manual

XRA1405
16-BIT SPI GPIO EXPANDER WITH INTEGRATED LEVEL SHIFTERS
SEPTEMBER 2011
REV. 1.0.0
GENERAL DESCRIPTION
The XRA1405 is an 16-bit GPIO expander with an
SPI interface. After power-up, the XRA1405 has
internal 100K ohm pull-up resistors on each I/O pin
that can be individually enabled.
In addition, the GPIOs on the XRA1405 can
individually be controlled and configured. As outputs,
the GPIOs can be outputs that are high, low or in
three-state mode. The three-state mode feature is
useful for applications where the power is removed
from the remote devices, but they may still be
connected to the GPIO expander.
As inputs, the internal pull-up resistors can be
enabled or disabled and the input polarity can be
inverted. The interrupt can be programmed for
different behaviors. The interrupts can be
programmed to generate an interrupt on the rising
edge, falling edge or on both edges. The interrupt
can be cleared if the input changes back to its original
state or by reading the current state of the inputs.
The XRA1405 is available in 24-pin QFN and 24-pin
TSSOP packages.
FEATURES
1.65V to 3.6V operating voltage
16 General Purpose I/Os (GPIOs)
Integrated Level Shifters
5V tolerant inputs
Maximum stand-by current of 1uA at +1.8V
SPI bus interface
SPI Clock Frequency up to 26MHz
Individually programmable inputs
Internal pull-up resistors
Polarity inversion
Individual interrupt enable
Rising edge and/or Falling edge interrupt
Input filter
Individually programmable outputs
Output Level Control
Output Three-State Control
Open-drain active low interrupt output
3kV HBM ESD protection per JESD22-A114F
200mA latch-up performance per JESD78B
APPLICATIONS
Personal Digital Assistants (PDA)
Cellular Phones/Data Devices
Battery-Operated Devices
Global Positioning System (GPS)
Bluetooth
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com

1 page




XRA1405 pdf
XRA1405
REV. 1.0.0
16-BIT SPI GPIO EXPANDER WITH INTEGRATED LEVEL SHIFTERS
1.1.1 SPI Command Byte
An SPI command byte is sent by the SPI master following the slave address. The command byte indicates the
address offset of the register that will be accessed. Table 2 below lists the command bytes for each register.
TABLE 2: COMMAND BYTE (REGISTER ADDRESS)
COMMAND BYTE
REGISTER NAME DESCRIPTION
READ/WRITE DEFAULT VALUES
0x00
GSR1 - GPIO State for P0-P7
Read-Only
0xXX
0x01
GSR2 - GPIO State for P8-P15
Read-Only
0xXX
0x02
OCR1 - Output Control for P0-P7
Read/Write
0xFF
0x03
OCR2 - Output Control for P8-P15
Read/Write
0xFF
0x04
PIR1 - Input Polarity Inversion for P0-P7
Read/Write
0x00
0x05
PIR2 - Input Polarity Inversion for P8-P15
Read/Write
0x00
0x06
GCR1 - GPIO Configuration for P0-P7
Read/Write
0xFF
0x07
GCR2 - GPIO Configuration for P8-P15
Read/Write
0xFF
0x08
PUR1 - Input Internal Pull-up Resistor Enable/Disable for P0-P7 Read/Write
0x00
0x09
PUR2 - Input Internal Pull-up Resistor Enable/Disable for P8-P15 Read/Write
0x00
0x0A
IER1 - Input Interrupt Enable for P0-P7
Read/Write
0x00
0x0B
IER2 - Input Interrupt Enable for P8-P15
Read/Write
0x00
0x0C
TSCR1 - Output Three-State Control for P0-P7
Read/Write
0x00
0x0D
TSCR2 - Output Three-State Control for P8-P15
Read/Write
0x00
0x0E
ISR1 - Input Interrupt Status for P0-P7
Read
0x00
0x0F
ISR2 - Input Interrupt Status for P8-P15
Read
0x00
0x10
REIR1 - Input Rising Edge Interrupt Enable for P0-P7
Read/Write
0x00
0x11
REIR2 - Input Rising Edge Interrupt Enable for P8-P15
Read/Write
0x00
0x12
FEIR1 - Input Falling Edge Interrupt Enable for P0-P7
Read/Write
0x00
0x13
FEIR2 - Input Falling Edge Interrupt Enable for P8-P15
Read/Write
0x00
0x14
IFR1 - Input Filter Enable/Disable for P0-P7
Read/Write
0xFF
0x15
IFR2 - Input Filter Enable/Disable for P8-P15
Read/Write
0xFF
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XRA1405 arduino
REV. 1.0.0
XRA1405
16-BIT SPI GPIO EXPANDER WITH INTEGRATED LEVEL SHIFTERS
ELECTRICAL CHARACTERISTICS
DC ELECTRICAL CHARACTERISTICS
UNLESS OTHERWISE NOTED: TA = -40O TO +85OC, VCC IS 1.65V TO 3.6V
SYMBOL
PARAMETER
VIL Input Low Voltage
VIH Input High Voltage
VOL Output Low Voltage
LIMITS
1.8V ± 10%
MIN MAX
-0.3 0.2
1.4 5.5
0.4
LIMITS
2.5V ± 10%
MIN MAX
-0.3 0.5
1.8 5.5
0.4
LIMITS
3.3V ± 10%
MIN MAX
-0.3 0.8
2.0 5.5
0.4
VOL Output Low Voltage
VOH Output High Voltage
0.5 0.5 0.5
2.0
1.8
1.4
VOH Output High Voltage
2.6
1.8
1.2
IIL Input Low Leakage Current
±10
±10
±10
IIH Input High Leakage Current
±10
±10
±10
CIN Input Pin Capacitance
55 5
ICC Power Supply Current
0.5 1.0 2.0
ICC Power Supply Current
0.6 1.2 2.4
ICCS Standby Current
12 5
RGPIO GPIO pull-up resistance
60 140 60 140 60 140
UNITS CONDITIONS
V Note 1
V Note 1
V IOL = 6 mA
V IOL = 4 mA
V IOL = 1.5 mA
Note 2 &
Note 4
V IOL = 8 mA
Note 3
V IOL = -4 mA
V IOL = -2 mA
V IOL = -0.2 mA
Note 2
V IOH = -8 mA
V IOH = -8 mA
V IOH = -8 mA
Note 3
uA
uA
pF
mA Test 1
mA Test 2
uA Test 3
k100k± 40%
NOTE: The Vcc comes from VCCP pin for the GPIOs and the VCC pin for the other signals;
NOTES:
1. For SPI input signals (SI, SCL) & GPIOs, A0, A1 and A2 signals;
2. For SPI output signal SO;
3. For GPIOs;
4. For IRQ# signal;
Test 1: SCL frequency is 10 MHz with internal pull-ups disabled. All GPIOs are configured as inputs. All inputs are steady at
VCC or GND. Outputs are floating or in the tri-state mode.
Test 2: SCL frequency is 10 MHz with internal pull-ups enabled. All GPIOs are configured as inputs. All inputs are steady at
VCC or GND. Outputs are floating or in the tri-state mode.
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