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PDF XRA1206 Data sheet ( Hoja de datos )

Número de pieza XRA1206
Descripción 8-BIT I2C/SMBUS GPIO EXPANDER
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No Preview Available ! XRA1206 Hoja de datos, Descripción, Manual

XRA1206
8-BIT I2C/SMBUS GPIO EXPANDER WITH INTEGRATED LEVEL SHIFTERS
SEPTEMBER 2011
REV. 1.0.0
GENERAL DESCRIPTION
The XRA1206 is an 8-bit GPIO expander with an I2C/
SMBus interface. After power-up, the XRA1206 has
internal 100K ohm pull-up resistors on each I/O pin
that can be individually enabled.
In addition, the GPIOs on the XRA1206 can
individually be controlled and configured. As outputs,
the GPIOs can be outputs that are high, low or in
three-state mode. The three-state mode feature is
useful for applications where the power is removed
from the remote devices, but they may still be
connected to the GPIO expander.
As inputs, the internal pull-up resistors can be
enabled or disabled and the input polarity can be
inverted. The interrupt can be programmed for
different behaviors. The interrupts can be
programmed to generate an interrupt on the rising
edge, falling edge or on both edges. The interrupt
can be cleared if the input changes back to its original
state or by reading the current state of the inputs.
The XRA1206 is an enhanced version of the
TCA6408. The XRA1206 is pin and software
compatible with the TCA6408.
The XRA1206 is available in 16-pin QFN and 16-pin
TSSOP packages.
FEATURES
1.65V to 3.6V operating voltage
Integrated level shifters
8 General Purpose I/Os (GPIOs)
5V tolerant inputs
Maximum stand-by current of 1uA at +1.8V
I2C/SMBus bus interface
I2C clock frequency up to 400kHz
Noise filter on SDA and SCL inputs
Up to 4 I2C Slave Addresses
Individually programmable inputs
Internal pull-up resistors
Polarity inversion
Individual interrupt enable
Rising edge and/or Falling edge interrupt
Input filter
Individually programmable outputs
Output Level Control
Output Three-State Control
Open-drain active low interrupt output
Active-low reset input
Pin and software compatible with TCA6408
3kV HBM ESD protection per JESD22-A114F
200mA latch-up performance per JESD78B
APPLICATIONS
Personal Digital Assistants (PDA)
Cellular Phones/Data Devices
Battery-Operated Devices
Global Positioning System (GPS)
Bluetooth
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com

1 page




XRA1206 pdf
XRA1206
REV. 1.0.0
8-BIT I2C/SMBUS GPIO EXPANDER WITH INTEGRATED LEVEL SHIFTERS
1.1.1 I2C-bus Addressing
There could be many devices on the I2C-bus. To distinguish itself from the other devices on the I2C-bus, the
XRA1206 has up to 4 I2C slave addresses using the A0 address line. Table 1 below shows the different
addresses that can be selected.
TABLE 1: I2C ADDRESS MAP
A0
GND
VCC
SCL
SDA
I2C ADDRESS
0x40 (0100 000X)
0x42 (0100 001X)
0x50 (0101 000X)
0x52 (0101 001X)
1.1.2 I2C Read and Write
A read or write transaction is determined by bit-0 of the slave address. If bit-0 is ’0’, then it is a write
transaction. If bit-0 is ’1’, then it is a read transaction.
1.1.3 I2C Command Byte
An I2C command byte is sent by the I2C master following the slave address. The command byte indicates the
address offset of the register that will be accessed. Table 2 below lists the command bytes for each register.
TABLE 2: I2C COMMAND BYTE (REGISTER ADDRESS)
COMMAND BYTE
REGISTER NAME DESCRIPTION
READ/WRITE
DEFAULT VALUES
0x00
GSR - GPIO State
Read-Only
0xXX
0x01
OCR - Output Control
Read/Write
0xFF
0x02
PIR - Input Polarity Inversion
Read/Write
0x00
0x03
GCR - GPIO Configuration
Read/Write
0xFF
0x04
PUR - Input Internal Pull-up Resistor Enable/Disable
Read/Write
0x00
0x05
IER - Input Interrupt Enable
Read/Write
0x00
0x06
TSCR - Output Three-State Control
Read/Write
0x00
0x07
ISR - Input Interrupt Status
Read
0x00
0x08
REIR - Input Rising Edge Interrupt Enable
Read/Write
0x00
0x09
FEIR - Input Falling Edge Interrupt Enable
Read/Write
0x00
0x0A
IFR - Input Filter Enable/Disable
Read/Write
0xFF
5

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XRA1206 arduino
XRA1206
REV. 1.0.0
8-BIT I2C/SMBUS GPIO EXPANDER WITH INTEGRATED LEVEL SHIFTERS
5. For IRQ# signal;
Test 1: SCL frequency is 400 KHz with internal pull-ups disabled. All GPIOs are configured as inputs. All inputs are steady
at VCC or GND. Outputs are floating or in the tri-state mode.
Test 2: SCL frequency is 400 KHz with internal pull-ups enabled. All GPIOs are configured as inputs. All inputs are steady
at VCC or GND. Outputs are floating or in the tri-state mode.
Test 3: All inputs are steady at VCC or GND to minimize standby current. If internal pull-up is enabled, input voltage level
should be the same as VCC. All GPIOs are configured as inputs. SCL and SDA are at VCC. Outputs are left floating or in
tri-state mode.
AC ELECTRICAL CHARACTERISTICS
Unless otherwise noted: TA=-40o to +85oC, Vcc=1.65V - 3.6V
SYMBOL
PARAMETER
fSCL
TBUF
THD;STA
TSU;STA
THD;DAT
TVD;ACK
TVD;DAT
TSU;DAT
TLOW
THIGH
TF
TR
TSP
TD1
TD4
TD5
TD15
Operating frequency
Bus free time between STOP and START
START condition hold time
START condition setup time
Data hold time
Data valid acknowledge
SCL LOW to data out valid
Data setup time
Clock LOW period
Clock HIGH period
Clock/data fall time
Clock/data rise time
Pulse width of spikes tolerance
I2C-bus GPIO output valid
I2C input pin interrupt valid
I2C input pin interrupt clear
SCL delay after reset
STANDARD MODE
I2C-BUS
MIN MAX
0 100
FAST MODE
I2C-BUS
MIN MAX
0 400
4.7 1.3
4.0 0.6
4.7 0.6
00
0.6 0.6
0.6 0.6
250 150
4.7 1.3
4.0 0.6
300 300
1000
300
50 50
0.2 0.2
44
44
33
UNIT
kHz
µs
µs
µs
ns
µs
ns
ns
µs
µs
ns
ns
ns
µs
µs
µs
µs
11

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