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PDF XR77129 Data sheet ( Hoja de datos )

Número de pieza XR77129
Descripción 40V Quad Output Digital PWM/PFM Universal PMIC
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XR77129
40V Quad Output Digital PWM/PFM
Universal PMIC
General Description
The XR77129 is a quad channel digital Pulse Width Modulated (PWM)
step down (buck) controller. A wide 6V to 40V input voltage range allows
for single supply operation from standard power rails.
With integrated FET gate drivers, two LDOs for standby power and a
105kHz to 1.23MHz independent channel to channel programmable con-
stant operating frequency, the XR77129 reduces overall component
count, solution footprint and optimizes conversion efficiencies. A select-
able digital Pulse Frequency Mode (PFM) capable of better than 80% effi-
ciency at light current load and low operating current allow for portable
and Energy Star compliant applications. Each XR77129 channel’s output
voltage is individually programmable down to 0.6V with a resolution of
2.5mV, and is configurable for precise soft start and soft stop sequencing,
including delay and ramp control.
The XR77129 operations are fully controlled via a SMBus-compliant I2C
interface allowing for advanced local and/or remote reconfiguration, full
performance monitoring and reporting as well as fault handling.
Built-in independent output Over-Voltage, Over-Temperature, Over-Cur-
rent and Under-Voltage Lockout protections insure safe operation under
abnormal operating conditions.
The XR77129 is offered in a RoHS compliant, “green”/halogen free 44-pin
TQFN package.
FEATURES
Quad Channel Step-down Controller
Digital PWM 105kHz-1.23MHz Operation
Individual Channel Frequency Selection
Patented digital PFM with Ultrasonic mode
Patented Over Sampling Feedback
Programmable 5 coefficient PID control
Integrated MOSFET Drivers
6V to 40V Input Voltage
0.6V to 5.5V Output Voltage (higher with exter-
nal feedback resistors)
SMBus Compliant I2C Interface
Full Power Monitoring and Reporting
3 x 15V Capable PSIO + 2 x GPIOs
Full Start/Stop Sequencing Support
Built-in Thermal, Over-Current, UVLO and Out-
put Over-Voltage Protections
On Board 5V and LDOOUT Standby LDOs
On Board Non-Volatile Memory
Supported by PowerArchitect™ 5.2 or later
APPLICATIONS
Industrial Control Systems
Automatic Test Equipment
Video Surveillance Systems
Automotive Infotainment
Ordering Information – back page
Typical Application
© 2014 Exar Corporation
1 / 28
exar.com/XR77129
Rev 1A

1 page




XR77129 pdf
Symbol
Parameter
PWM Generators and Oscillator
fSW Switching Frequency Range
Switching Frequency Accuracy
fCLKIN
CLOCK IN Synchronization Fre-
quency
I2C and GPIOs2
VIL Input Pin Low Level
VIH Input Pin High Level
Input Pin Leakage Current
VOL Output Pin Low Level
VOH Output Pin High Level
PSIOs3
VIL
VIH
VIH
VOL
VOH
Output Pin High-Z Leakage Current
(GPIO pins only)
Maximum Sink Current
I/O Frequency
Input Pin Low Level
Input Pin High Level
Input Pin High Level
Input Pin Leakage Current
Output Pin Low Level
Output Pin High Level
Output Pin High-Z Leakage Current
(PSIO pins only)
I/O Frequency
SMBus (I2C) Interface
VIL Input Pin Low Level
VIH Input Pin High Level
VHYS
Hysteresis of Schmitt Trigger Inputs
Conditions
Steps defined in table
When synchronizing to an external clock
(Range 1)
When synchronizing to an external clock
(Range 2)
ISINK = 1mA
ISOURCE = 1mA
ISOURCE = 0mA
Open Drain Mode
PSIO0 and PSIO1
PSIO2
ISINK = 3mA
Open Drain. External pull-up resistor to
user supply.
VIO = 3.3V ±10%
VIO = 3.3V ±10%
VIO = 3.3V ±10%
VOL
ILEAK
Output Pin Low Level (open drain or
collector)
Input Leakage Current
ISINK = 3mA
Input is between 0.1VIO and 0.9VIO
© 2014 Exar Corporation
5 / 28
XR77129
Min Typ Max
Units
105 1230
-5 5
20 25.7 31
10 12.8 15.5
kHz
%
MHz
MHz
1.35
2.4
3.3
0.8
1
0.4
3.6
10
1
30
V
V
μA
V
V
V
μA
mA
MHz
0.8 V
2V
1.35 V
1 μA
0.4 V
15 V
10 μA
5 MHz
0.7VIO
0.05
VIO
-10
0.3VIO
0.4
10
V
V
V
V
μA
exar.com/XR77129
Rev 1A

5 Page





XR77129 arduino
XR77129
Figure 7: Sequential, Conditional Start-Up
Figure 8: Sequential, Conditional Shut-Down
Figure 9: Simultaneous Start-Up
Figure 10: Simultaneous Shut-Down
Figure 11: Ramp-Up Rate Dynamic Sweep
© 2014 Exar Corporation
11 / 28
Figure 12: Ramp-Down Rate Dynamic Sweep
exar.com/XR77129
Rev 1A

11 Page







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