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Número de pieza | EN27LN4G08 | |
Descripción | 3.3V NAND Flash Memory | |
Fabricantes | EON | |
Logotipo | ||
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No Preview Available ! EN27LN4G08
4 Gigabit (512M x 8), 3.3 V NAND Flash Memory
EN27LN4G08
Features
• Voltage Supply: 2.7V ~ 3.6V
• Organization
- Memory Cell Array :
(512M + 16M) x 8bit
- Data Register : (2K + 64) x 8bit
• Automatic Program and Erase
- Page Program : (2K + 64) bytes
- Block Erase : (128K + 4K) bytes
• Page Read Operation
- Page Size : (2K + 64) bytes
- Random Read : 25µs (Max.)
- Serial Access : 25ns (Min.)
• Memory Cell: 1bit/Memory Cell
• Fast Write Cycle Time
- Page Program Time : 250µs (Typ.)
- Block Erase Time : 2ms (Typ.)
• Command/Address/Data Multiplexed I/O Port
• Hardware Data Protection
- Program/Erase Lockout During Power
Transitions
• Reliable CMOS Floating-Gate Technology
- ECC Requirement: 4 bit/512 Byte
- Endurance: 100K Program/Erase Cycles
- Data Retention: 10 Years
• Command Register Operation
• Automatic Page 0 Read at Power-Up Option
- Boot from NAND support
- Automatic Memory Download
• NOP: 4 cycles
• Cache Program Operation for High Performance
Program
• Cache Read Operation
• Copy-Back Operation
- EDO mode
- OTP Operation
- Two-Plane Operation
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
1
©2013 Eon Silicon Solution, Inc., www.eonssi.com
Rev. A, Issue Date: 2013/10/03
1 page Address Cycle Map
EN27LN4G08
I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7
Address
1st Cycle A0 A1 A2 A3 A4 A5 A6 A7 Column Address
2nd Cycle A8 A9 A10 A11 L* L* L* L* Column Address
3rd Cycle A12 A13 A14 A15 A16 A17 A18 A19 Row Address
4th Cycle A20 A21 A22 A23 A24 A25 A26 A27 Row Address
5th Cycle A28 A29 L* L* L* L* L* L*
Note:
Row Address
1. Column Address : Starting Address of the Register.
2. * L must be set to “Low”.
3. * The device ignores any additional input of address cycles than required.
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
5
©2013 Eon Silicon Solution, Inc., www.eonssi.com
Rev. A, Issue Date: 2013/10/03
5 Page EN27LN4G08
AC Characteristics for Operation
Parameter
Symbol
Min.
Max.
Unit
Data Transfer from Cell to Register
ALE to RE# Delay
CLE to RE# Delay
Ready to RE# Low
RE# Pulse Width
WE# High to Busy
WP# Low to WE# Low (disable mode)
WP# High to WE# Low (enable mode)
tR
tAR
tCLR
tRR
tRP
tWB
tWW
-
10
10
20
12
-
100
25 us
- ns
- ns
- ns
- ns
100 ns
- ns
Read Cycle Time
RE# Access Time
CE# Access Time
RE# High to Output Hi-Z
CE# High to Output Hi-Z
CE# High to ALE or CLE Don’t Care
RE# High to Output Hold
RE# Low to Output Hold
CE# High to Output Hold
RE# High Hold Time
Output Hi-Z to RE# Low
RE# High to WE# Low
WE# High to RE# Low
Read
Device Resetting
Program
Time during ...
Erase
Ready
tRC
tREA
tCEA
tRHZ
tCHZ
tCSD
tRHOH
tRLOH
tCOH
tREH
tIR
tRHW
tWHR
tRST
25
-
-
-
-
0
15
5
15
10
0
100
60
-
-
-
-
-
20
25
100
30
-
-
-
-
-
-
-
-
5(1)
10(1)
500
5(1)
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
us
us
us
us
Cache Busy in Read Cache (following
31h and 3Fh)
tDCBSYR
-
30 us
Note:
1. If reset command (FFh) is written at Ready state, the device goes into Busy for maximum 5us.
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
11
©2013 Eon Silicon Solution, Inc., www.eonssi.com
Rev. A, Issue Date: 2013/10/03
11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet EN27LN4G08.PDF ] |
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