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Número de pieza | ICX267AL | |
Descripción | Diagonal 8mm (Type 1/2) Progressive Scan CCD Image Sensor | |
Fabricantes | Sony | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de ICX267AL (archivo pdf) en la parte inferior de esta página. Total 26 Páginas | ||
No Preview Available ! ICX267AL
Diagonal 8mm (Type 1/2) Progressive Scan CCD Image Sensor with Square Pixel for B/W Cameras
Description
The ICX267AL is a diagonal 8mm (Type 1/2) interline
CCD solid-state image sensor with a square pixel array
and 1.45M effective pixels. Progressive scan allows all
pixels' signals to be output independently. Also, the
adoption of high frame rate readout mode supports
30 frames per second. This chip features an electronic
shutter with variable charge-storage time which
makes it possible to realize full-frame still image
without a mechanical shutter. High resolution and
high low dark current are achieved through the
adoption of HAD (Hole-Accumulation Diode)
sensors.
This chip is suitable for applications such as
electronic still cameras, PC input cameras, etc.
20 pin DIP (Plastic)
Features
• Progressive scan allows individual readout of the
image signals from all pixels.
• High horizontal and vertical resolution (both approx.
1024TV-lines) still image without a mechanical
shutter.
• Supports high frame rate readout mode
(effective 512 lines output, 30 frames/s)
• Square pixel
• Horizontal drive frequency: 28.636MHz
• No voltage adjustments
(reset gate and substrate bias are not adjusted.)
• High resolution, high color reproductivity,
high sensitivity, low dark current
• Low smear, excellent antiblooming characteristics
• Continuous variable-speed shutter
Pin 1
V
2
Pin 11
H
40
Optical black position
(Top view)
Device Structure
• Interline CCD image sensor
• Image size:
Diagonal 8mm (Type 1/2)
• Total number of pixels: 1434 (H) × 1050 (V) approx. 1.50M pixels
• Number of effective pixels: 1392 (H) × 1040 (V) approx. 1.45M pixels
• Number of active pixels: 1360 (H) × 1024 (V) approx. 1.40M pixels (7.959mm diagonal)
• Chip size:
7.60mm (H) × 6.20mm (V)
• Unit cell size:
4.65µm (H) × 4.65µm (V)
• Optical black:
Horizontal (H) direction: Front 2 pixels, rear 40 pixels
Vertical (V) direction: Front 8 pixels, rear 2 pixels
• Number of dummy bits: Horizontal 20
Vertical 3
• Substrate material:
Silicon
2
8
∗ Wfine CCD is a registered trademark of Sony Corporation.
Represents a CCD adopting progressive scan, primary color filter and square pixel.
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E01Y03B43
1 page ICX267AL
Bias Conditions
Item Symbol Min. Typ. Max. Unit Remarks
Power Supply voltage
Protective transistor bias
Substrate clock
Reset gate clock
VDD
VL
φSUB
φRG
14.55
15.0
∗1
∗2
∗2
15.45
V
∗1 VL setting is the VVL voltage of the vertical transfer clock waveform, or the same power supply as the VL
power supply for the V driver should be used.
∗2 Do not apply a DC bias to the substrate clock and reset gate clock pins, because a DC bias is generated
within the CCD.
DC Characteristics
Item
Power supply current
Symbol Min. Typ. Max. Unit Remarks
IDD 7.7 mA
Clock Voltage Conditions
Item Symbol
Readout clock voltage VVT
VVH02A
VVH1, VVH2A,
VVH2B, VVH3
VVL1, VVL2A,
VVL2B, VVL3
Vertical transfer clock
voltage
Vφ1, Vφ2A,
Vφ2B, Vφ3
| VVL1 – VVL3 |
VVHH
VVHL
VVLH
VVLL
Horizontal transfer
clock voltage
VφH
VHL
Reset gate clock
voltage
VφRG
VRGLH – VRGLL
VRGL – VRGLm
Substrate clock voltage VφSUB
Min.
14.55
–0.05
–0.2
–8.4
7.6
4.75
–0.05
3.0
22.15
Typ.
15.0
0
Max.
Unit
Waveform
diagram
Remarks
15.45 V
1
0.05 V
2 VVH = VVH02A
0 0.05 V
2
–8.0 –7.6 V
2 VVL = (VVL1 + VVL3)/2
8.0 8.4 V
0.1 V
0.9 V
1.3 V
1.0 V
0.9 V
5.0 5.25 V
0 0.05 V
3.3 5.5 V
0.4 V
0.5 V
23.0 23.85 V
2
2
2 High-level coupling
2 High-level coupling
2 Low-level coupling
2 Low-level coupling
3
3
4
4 Low-level coupling
4 Low-level coupling
5
–5–
5 Page ICX267AL
Image Sensor Characteristics Measurement Method
Readout modes
The diagram below shows the output methods for the following three readout modes.
Progressive scan mode
High frame rate readout mode
High frame rate readout two pixels
addition mode
9 (V2A)
8 (V2B)
7 (V2B)
6 (V2A)
5 (V2A)
4 (V2B)
3 (V2B)
2 (V2A)
1 (V2A)
VOUT
9 (V2A)
8 (V2B)
7 (V2B)
6 (V2A)
5 (V2A)
4 (V2B)
3 (V2B)
2 (V2A)
1 (V2A)
VOUT
9 (V2A)
8 (V2B)
7 (V2B)
6 (V2A)
5 (V2A)
4 (V2B)
3 (V2B)
2 (V2A)
1 (V2A)
VOUT
1. Progressive scan mode
In this mode, all pixels signals are output in non-interlace format in 1/15s.
The vertical resolution is approximately 800 TV-lines and all pixels signals within the same exposure period
are read out simultaneously, making this mode suitable for high resolution image capturing.
2. High frame rate readout mode
All effective areas are scanned in approximately 1/30s by reading out two out of four lines (3rd and 4th
lines, 7th and 8th lines). The vertical resolution is approximately 400 TV-lines.
This readout mode emphasizes processing speed over vertical resolution.
3. High frame rate readout two pixels addition mode
All effective areas are scanned in approximately 1/30s by reading out two out of four lines (3rd and 4th
lines, 7th and 8th lines), and by reading out two out of the remaining four lines (1st and 2nd lines, 5th and
6th lines) after shifting the vertical register by 2 bits, and adding them in the vertical register.
– 11 –
11 Page |
Páginas | Total 26 Páginas | |
PDF Descargar | [ Datasheet ICX267AL.PDF ] |
Número de pieza | Descripción | Fabricantes |
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