PDF ICX267AK Data sheet ( Hoja de datos )

Número de pieza	ICX267AK
Descripción	Diagonal 8mm (Type 1/2) Progressive Scan CCD Image Sensor
Fabricantes	Sony
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No Preview Available ! ICX267AK Diagonal 8mm (Type 1/2) Progressive Scan CCD Image Sensor with Square Pixel for Color Cameras Description The ICX267AK is a diagonal 8mm (Type 1/2) interline CCD solid-state image sensor with a square pixel array and 1.45M effective pixels. Progressive scan allows all pixels' signals to be output independently. Also, the adoption of high frame rate readout mode supports 30 frames per second. This chip features an electronic shutter with variable charge-storage time which makes it possible to realize full-frame still image without a mechanical shutter. High resolution and high color reproductivity are achieved through the use of R, G, B primary color mosaic filters. Further, high sensitivity and low dark current are achieved through the adoption of HAD (Hole-Accumulation Diode) sensors. This chip is suitable for applications such as electronic still cameras, PC input cameras, etc. 20 pin DIP (Plastic) Features • Progressive scan allows individual readout of the image signals from all pixels. • High horizontal and vertical resolution (both approx. 800TV-lines) still image without a mechanical shutter. • Supports high frame rate readout mode (effective 512 lines output, 30 frames/s) • Square pixel • Horizontal drive frequency: 28.636MHz • No voltage adjustments (reset gate and substrate bias are not adjusted.) • R, G, B primary color mosaic filters on chip • High resolution, high color reproductivity, high sensitivity, low dark current • Low smear, excellent antiblooming characteristics • Continuous variable-speed shutter Pin 1 V 2 Pin 11 H 40 Optical black position (Top view) Device Structure • Interline CCD image sensor • Image size: Diagonal 8mm (Type 1/2) • Total number of pixels: 1434 (H) × 1050 (V) approx. 1.50M pixels • Number of effective pixels: 1392 (H) × 1040 (V) approx. 1.45M pixels • Number of active pixels: 1360 (H) × 1024 (V) approx. 1.40M pixels (7.959mm diagonal) • Chip size: 7.60mm (H) × 6.20mm (V) • Unit cell size: 4.65µm (H) × 4.65µm (V) • Optical black: Horizontal (H) direction: Front 2 pixels, rear 40 pixels Vertical (V) direction: Front 8 pixels, rear 2 pixels • Number of dummy bits: Horizontal 20 Vertical 3 • Substrate material: Silicon 2 8 ∗ Wfine CCD is a registered trademark of Sony Corporation. Represents a CCD adopting progressive scan, primary color filter and square pixel. Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E99947A33 1 page ICX267AK Clock Equivalent Circuit Constant Item Symbol CφV1 Capacitance between vertical transfer clock and CφV2A GND CφV2B CφV3 CφV12A, CφV2B1 Capacitance between vertical transfer clocks CφV2A3, CφV32B CφV13 Capacitance between horizontal transfer clock and GND CφH1, CφH2 Capacitance between horizontal transfer clocks CφHH Capacitance between reset gate clock and GND CφRG Capacitance between substrate clock and GND CφSUB R1 Vertical transfer clock series resistor R2A, R3 R2B Vertical transfer clock ground resistor RGND Horizontal transfer clock series resistor RφH Reset gate clock series resistor RφRG Min. Typ. 2200 3300 3300 3300 1200 1200 2200 47 100 8 680 36 56 56 30 15 20 Max. Unit Remarks pF pF pF pF pF pF pF pF pF pF pF Ω Ω Ω Ω Ω Ω Vφ1 R1 CφV12A Vφ2A R2A CφV2B1 CφV1 CφV2A CφV2A3 CφV13 CφV2B RGND CφV3 R2B CφV32B R3 RφH Hφ1 CφH1 CφHH RφH Hφ2 CφH2 Vφ2B Vφ3 Vertical transfer clock equivalent circuit Horizontal transfer clock equivalent circuit RGφ RφRG CφRG Reset gate clock equivalent circuit –5– 5 Page ICX267AK Readout modes The diagram below shows the output methods for the following three readout modes. Progressive scan mode High frame rate readout mode High frame rate readout two pixels addition mode 9 (V2A) 8 (V2B) 7 (V2B) 6 (V2A) 5 (V2A) 4 (V2B) 3 (V2B) 2 (V2A) 1 (V2A) VOUT 9 (V2A) 8 (V2B) 7 (V2B) 6 (V2A) 5 (V2A) 4 (V2B) 3 (V2B) 2 (V2A) 1 (V2A) VOUT 9 (V2A) 8 (V2B) 7 (V2B) 6 (V2A) 5 (V2A) 4 (V2B) 3 (V2B) 2 (V2A) 1 (V2A) VOUT 1. Progressive scan mode In this mode, all pixels signals are output in non-interlace format in 1/15s. The vertical resolution is approximately 800 TV-lines and all pixels signals within the same exposure period are read out simultaneously, making this mode suitable for high resolution image capturing. 2. High frame rate readout mode All effective areas are scanned in approximately 1/30s by reading out two out of four lines (3rd and 4th lines, 7th and 8th lines). The vertical resolution is approximately 400 TV-lines. This readout mode emphasizes processing speed over vertical resolution. 3. High frame rate readout two pixels addition mode All effective areas are scanned in approximately 1/30s by reading out two out of four lines (3rd and 4th lines, 7th and 8th lines), and by reading out two out of the remaining four lines (1st and 2nd lines, 5th and 6th lines) after shifting the vertical register by 2 bits, and adding them in the vertical register. – 11 – 11 Page

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