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PDF CLC5602IM Data sheet ( Hoja de datos )

Número de pieza CLC5602IM
Descripción Dual/ High Output/ Video Amplifier
Fabricantes National Semiconductor 
Logotipo National Semiconductor Logotipo



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N
CLC5602
Dual, High Output, Video Amplifier
June 1999
General Description
The National CLC5602 has a new output stage that delivers high
output drive current (130mA), but consumes minimal
quiescent supply current (1.5mA/ch) from a single 5V supply. Its
current feedback architecture, fabricated in an advanced comple-
mentary bipolar process, maintains consistent performance over
a wide range of gains and signal levels, and has a linear-phase
response up to one half of the -3dB frequency.
The CLC5602 offers 0.1dB gain flatness to 22MHz and differen-
tial gain and phase errors of 0.06% and 0.02°. These features are
ideal for professional and consumer video applications.
The CLC5602 offers superior dynamic performance with a
135MHz small-signal bandwidth, 300V/µs slew rate and 5.7ns
rise/fall times (2Vstep). The combination of low quiescent power,
high output current drive, and high-speed performance make
the CLC5602 well suited for many battery-powered personal
communication/computing systems.
The ability to drive low-impedance, highly capacitive loads,
makes the CLC5602 ideal for single ended cable applications.
It also drives low impedance loads with minimum distortion.
The CLC5602 will drive a 100load with only -86/-85dBc
second/third harmonic distortion (Av = +2, Vout = 2Vpp, f = 1MHz).
With a 25load, and the same conditions, it produces only -86/
-72dBc second/third harmonic distortion.
The CLC5602 can also be used for driving differential-input step-
up transformers for applications such as Asynchronous Digital
Subscriber Lines (ADSL) or High-Bit-Rate Digital Subscriber
Lines (HDSL).
When driving the input of high-resolution A/D converters, the
CLC5602 provides excellent -87/-95dBc second/third harmonic
distortion (Av = +2, Vout = 2Vpp, f = 1MHz, RL = 1k) and fast
settling time.
Features
s 130mA output current
s 0.06%, 0.02° differential gain, phase
s 1.5mA/ch supply current
s 135MHz bandwidth (Av = +2)
s -87/-95dBc HD2/HD3 (1MHz)
s 15ns settling to 0.05%
s 300V/µs slew rate
s Stable for capacitive loads up to 1000pf
s Single 5V or ±5V supplies
Applications
s Video line driver
s ADSL/HDSL driver
s Coaxial cable driver
s UTP differential line driver
s Transformer/coil driver
s High capacitive load driver
s Portable/battery-powered applications
s Differential A/D driver
Maximum Output Voltage vs. RL
10
9
8
7 VCC = ±5V
6
5
4
3 Vs = +5V
2
1
10 100
RL ()
1000
Typical Application
Differential Line Driver with Load Impedance Conversion
Rg2
Vin
Rt1
Vd/2
+
1/2
CLC5602
-
Rf1
Rg1 Rt2
Rf2
-
1/2
CLC5602
+
-Vd/2
Rm/2
Req
Rm/2
1:n
Zo
UTP
Io
RL
+
Vo
-
Vo1
Vinv1
Vnon-inv1
-VCC
Pinout
DIP & SOIC
+VCC
Vo2
Vinv2
Vnon-inv2
© 1999 National Semiconductor Corporation
Printed in the U.S.A.
http://www.national.com

1 page




CLC5602IM pdf
±5V Typical Performance (Av = +2, Rf = 750, RL = 100, VCC = ±5V, unless specified)
Frequency Response
Inverting Frequency Response
Frequency Response vs. RL
Vo = 1.0Vpp
Gain
Phase
Av = +1
Rf = 1.0k
Av = +5
Rf = 301
Av = +10
Rf = 200
1M 10M
Frequency (Hz)
Av = +2
Rf = 649
100M
0
-45
-90
-135
-180
-225
Frequency Response vs. Vo
Vo = 5Vpp
Vo = 1Vpp
Vo = 0.1Vpp
Vo = 2Vpp
Vo = 1.0Vpp
Gain
Av = -2
Rf = 649
Phase
Av = -1
Rf = 649
Av = -5
Rf = 649
Av = -10
Rf = 500
1M 10M 100M
Frequency (Hz)
180
135
90
45
0
-45
Gain Flatness & Linear Phase
0.4
Gain
0.3
0.2
Phase
0.1
0
Vo = 1.0Vpp
Gain
RL = 1k
Phase
RL = 100
RL = 25
1M 10M 100M
Frequency (Hz)
0
-90
-180
-270
-360
-450
Small Signal Pulse Response
Av = +2
Av = -2
1M 10M 100M
Frequency (Hz)
Large Signal Pulse Response
Av = +2
Av = -2
Time (20ns/div)
2nd & 3rd Harmonic Distortion, RL = 25
-30
-40 3rd, 10MHz
-50
-60 2nd, 10MHz
-70 3rd, 1MHz
-80
2nd, 1MHz
-90
-100
0
1 2 34
Output Amplitude (Vpp)
5
Short Term Settling Time
0.2
0.15
0.1
0.05
0
-0.05
-0.1
-0.15
-0.2
1
10 100
Time (ns)
1000
10000
-0.1
0 5 10 15 20 25 30
Frequency (MHz)
Differential Gain & Phase
0
0
-0.04
-0.08
-0.12
Gain Neg Sync
Gain Pos Sync
-0.04
Phase Pos Sync
Phase Neg Sync
-0.08
-0.12
-0.16 -0.16
-0.2
1
23
Number of 150 Loads
-0.2
4
2nd & 3rd Harmonic Distortion, RL = 100
-40
-50 3rd, 10MHz
-60
-70 2nd, 10MHz
-80 3rd, 1MHz
-90
-100 2nd, 1MHz
-110
0
0.5 1 1.5 2
Output Amplitude (Vpp)
2.5
Long Term Settling Time
0.2
0.15
0.1
0.05
0
-0.05
-0.1
-0.15
-0.2
1µ
10µ 100µ
1m
Time (s)
5
10m 100m
Time (10ns/div)
2nd & 3rd Harmonic Distortion vs. Frequency
-30
Vo = 2Vpp
-40
-50
2nd
RL = 100
-60
2nd
-70 RL = 1k
-80 3rd
3rd RL = 100
-90 RL = 1k
-100
1
Frequency (MHz)
10
2nd & 3rd Harmonic Distortion, RL = 1k
-50
3rd, 10MHz
-60
2nd, 10MHz
-70
-80 2nd, 1MHz
-90 3rd, 1MHz
-100
-110
0
1 2 34
Output Amplitude (Vpp)
IBI, IBN, VOS vs. Temperature
1.4
5
3
1.3
IBI
1.2
2
1
1.1
VOS
1
IBN
0.9
0
-1
-2
0.8
-60
-20 20 60 100
Temperature (°C)
-3
140
http://www.national.com

5 Page





CLC5602IM arduino
where Zo(5602)(jω) is the output impedance of the
CLC5602 and |Zo(5602)(jω)| << Rm.
The load voltage and current will fall in the ranges:
Vo n Vmax
Io
Imax
n
The CLC5602’s high output drive current and low
distortion make it a good choice for this application.
Full Duplex Cable Driver
The circuit shown in Figure 16 below, operates as a full
duplex cable driver which allows simultaneous transmis-
sion and reception of signals on one transmission line.
The circuit on either side of the transmission line uses are
CLC5602 as a cable driver, and the second CLC5602 as
a receiver. VoA is an attenuated version of VinA, while VoB
is an attenuated version of VinB.
VinA
Rt1
VoB
+
1/2
CLC5602
-
Rm1
Rf1 Rg2
Rf2
-
1/2
CLC5602
+
Rt2
Z0
Rm1
+
1/2
CLC5602
-
Rg2 Rf1
Rf2
-
1/2
Rt2 CLC5602
+
VinB
Rt1
VoA
Figure 16: Full Duplex Cable Driver
Rm1 is used to match the transmission line. Rf2 and Rg2
set the DC gain of the CLC5602, which is used in a
difference mode. Rt2 provides good CMRR and DC
offset. The transmitting CLC5602’s are shown in a unity
gain configuration because they consume the least
power of any gain, for a given load. For proper operation
we need Rf2 = Rg2.
The receiver output voltages are:
VoutA(B)
VinA(B) A
+
VinB(A)
2
1
Rf2
Rg2
+
Zo(5602)(jω)
Rm1 
where A is the attenuation of the cable, Zo(5602)(jω) is the
output impedance of the CLC5602 (see the Closed-Loop
Output Resistance plot), and |Zo(5602)(jω)| << Rm1.
We selected the component values as follows:
s Rf1 = 1.0k, the recommended value for the
CLC5602 at unity gain
s Rm1 = Zo = 50, the characteristic impedance
of the transmission line
s Rf2 = Rg2 = 750Rm1, the recommended
value for the CLC5602 at Av = 2
s
Rt2
=
(Rf2
|| Rg2 ) –
Rm1
2
=
25
These values give excellent isolation from the other input:
VoA(B) ≈ −38dB, f = 5.0MHz
VinB(A)
The CLC5602 provides large output current drive, while
consuming little supply current, at the nominal bias point.
It also produces low distortion with large signal swings
and heavy loads. These features make the CLC5602 an
excellent choice for driving transmission lines.
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