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Número de pieza CLC428AJP
Descripción Dual Wideband/ Low-Noise/ Voltage Feedback Op Amp
Fabricantes National Semiconductor 
Logotipo National Semiconductor Logotipo



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N
June 1999
CLC428
Dual Wideband, Low-Noise, Voltage Feedback Op Amp
General Description
The CLC428 is a very high-speed dual op amp that offers a traditional
voltage-feedback topology featuring unity-gain stability and slew-
enhanced circuitry. The CLC428’s ultra low noise and very low
harmonic distortion combine to form a very wide dynamic-range op
amp that operates from a single (5 to 12V) or dual (±5V) power supply.
Each of the CLC428’s closely matched channels provides a 160MHz
unity-gain bandwidth with an ultra low input voltage noise density
(2nV/Hz). Very low 2nd/3rd harmonic distortion (-62/-72dBc) as well
as high channel-to-channel isolation (-62dB) make the CLC428 a
perfect wide dynamic-range amplifier for matched I/Q channels.
With its fast and accurate settling (16ns to 0.1%), the CLC428 is also
a excellent choice for wide-dynamic range, anti-aliasing filters
to buffer the inputs of hi-resolution analog-to-digital converters.
Combining the CLC428’s two tightly-matched amplifiers in a single
eight-pin SOIC reduces cost and board space for many composite
amplifier applications such as active filters, differential line drivers/
receivers, fast peak detectors and instrumentation amplifiers.
Features
s Wide unity-gain bandwidth: 160MHz
s Ultra-low noise: 2.0nV/Hz
s Low distortion: -78dBc 2nd (2MHz)
-62/-72dBc (10MHz)
s Settling time: 16ns to 0.1%
s Supply voltage range: ±2.5 to ±5 or
single supply
s High output current: ±80mA
Applications
s General purpose dual op amp
s Low noise integrators
s Low noise active filters
s Diff-in/diff-out instrumentation amp
s Driver/receiver for transmission systems
s High-speed detectors
s I/Q channel amplifiers
To reduce design times and assist in board layout, the CLC428 is
supported by an evaluation board and a SPICE simulation model
available from National Semiconductor.
Typical Application
5-Decade Integrator
© 1999 National Semiconductor Corporation
Printed in the U.S.A.
Pinout
DIP & SOIC
Vout1 1
Vinv1 2
Vnon-inv1 3
-Vcc 4
-
+
-
+
8 +Vcc
7 Vout2
6 Vinv2
5 Vnon-inv2
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CLC428AJP pdf
Analog Delay Circuit (All-Pass Network)
Thecircuit in Figure1implementsan all-passnetworkusing
the CLC428. A wide bandwidth buffer (CLC111) drives the
circuit and provides a high input impedence for the source.
As shown in Figure 2, the circuit provides a
Figure 1
Figure 3
A1 (B1) and pass the signals from driver B1 (A1). The
output of the receiver amplifier will be:
F I F I1
HGG KJJ HGG KJJVoutAeBj = 2 VinAaBf
1Rf
Rg
1
+ 2 VinBaAf
1+ Rf
Rg
Eq. 3
Care must be given to layout and component placement to
maintain a high frequency common-mode rejection. The
plot of Figure 4 shows the simultaneous reception of
signals transmitted at 1MHz and 10MHz.
Figure 2
13.1ns delay (with R =40.2, C=47pF). Rf and Rg should
be of equal and low value for parasitic insensitive opera-
tion. The circuit gain is +1 and the delay is determined by
the following equations.
c hτdelay = 2 2RC + Td
Eq. 1
Td
=
1
360
dφ
df
;
Eq. 2
where Td is the delay of the op amp at AV=+1. The CLC428
provides a typical delay of 2.8ns at its -3dB point.
Full Duplex Digital or Analog Transmission
Simultaneous transmission and reception of analog or
digital signals over a single coaxial cable or twisted-pair
line can reduce cabling requirements. The CLC428's wide
bandwidth and high common-mode rejection in a differen-
tial amplifier configuration allows full duplex transmission
of video, telephone, control and audio signals.
Figure 4
Five Decade Integrator
A composite integrator, as shown in Figure 5, uses the
CLC428 dual op amp to increase the circuits' usable
frequency range of operation. The transfer function of this
circuit is:
zVo
=
1
RC
Vin dt
Eq. 4
In the circuit shown in Figure 3, one of the CLC428's amps
is used as a "driver" and the other as a difference
"receiver" amplifier. The output impedance of the "driver"
is essentially zero. The two R's are chosen to match the
characteristic impedance of the transmission line. The
"driver" op amp gain can be selected for unity or greater.
Receiver amplifier A2 (B2) is connected across R and
forms differential amplifier for the signals transmitted by
driver A1 (B1). If the coax cable is lossless and Rf equals
Rg, receiver A2 (B2) will then reject the signals from driver
Figure 5
A resistive divider made from the 143and 60.4
resistors was chosen to reduce the loop-gain and stabilize
the network. The CLC428 composite integrator provides
integration over five decades of operation. R and C set the
integrator's gain. Figure 6 shows the frequency and phase
response of the circuit in Figure 5 with R = 44.2and
C = 360pF.
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