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PDF MTFC16GJDEC-2M-WT Data sheet ( Hoja de datos )

Número de pieza MTFC16GJDEC-2M-WT
Descripción e-MMC Memory
Fabricantes Micron 
Logotipo Micron Logotipo



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No Preview Available ! MTFC16GJDEC-2M-WT Hoja de datos, Descripción, Manual

Micron Confidential and Proprietary
2GB, 4GB, 8GB, 16GB, 32GB, 64GB: e·MMC
Features
e·MMCMemory
MTFC2GMDEA-0M WT, MTFC4GLDEA-0M WT, MTFC4GMDEA-1M WT,
MTFC8GLDEA-1M WT, MTFC16GJDEC-2M WT, MTFC32GJDED-3M WT,
MTFC64GJDDN-3M WT
Features
• MultiMediaCard (MMC) controller and NAND Flash
• 153- or 169-ball WFBGA/VFBGA/LFBGA (RoHS 6/6-
compliant)
• VCC: 2.7–3.6V
• VCCQ (dual voltage): 1.65–1.95V; 2.7–3.6V
• Temperature ranges
– Operating temperature: –25˚C to +85˚C
– Storage temperature: –40˚C to +85˚C
• Typical current consumption
– Standby current: 110µA for 2GB, 120µA for 4GB,
8GB, 16GB; 140µA for 32G; 160µA for 64GB
– Active current (RMS): 70mA (2GB); 80mA (4GB,
8GB, 16GB, 32GB, 64GB)
MMC-Specific Features
• JEDEC/MMC standard version 4.41-compliant
(JEDEC Standard No. 84-A441) – SPI mode not
supported (see www.jedec.org/sites/default/files/
docs/JESD84-A441.pdf)
– Advanced 11-signal interface
– x1, x4, and x8 I/Os, selectable by host
– MMC mode operation
– Command classes: class 0 (basic); class 2 (block
read); class 4 (block write); class 5 (erase);
class 6 (write protection); class 7 (lock card)
– MMCplusand MMCmobileprotocols
– Temporary write protection
– 52 MHz clock speed (MAX)
– Boot operation (high-speed boot)
– Sleep mode
– Replay-protected memory block (RPMB)
– Secure erase and trim
– Hardware reset signal
– Multiple partitions with enhanced attribute
– Permanent and power-on write protection
– Double data rate (DDR) function
– High-priority interrupt (HPI)
Figure 1: Micron e·MMC Device
MMC
power
MMC controller
MMC
interface
NAND Flash
power
NAND Flash
MMC-Specific Features (Continued)
– Enhanced reliable write
– Configurable reliability settings
– Background operation
– Fully enhanced configurable
– Backward-compatible with previous MMC
modes
• ECC and block management implemented
PDF: 09005aef8523cb32
emmc_2gb-64gb_ctrd_441-wt.pdf - Rev. B 9/13 EN
1 Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2013 Micron Technology, Inc. All rights reserved.
Products and specifications discussed herein are subject to change by Micron without notice.

1 page




MTFC16GJDEC-2M-WT pdf
Micron Confidential and Proprietary
Signal Descriptions
2GB, 4GB, 8GB, 16GB, 32GB, 64GB: e·MMC
Signal Descriptions
Table 3: Signal Descriptions
Symbol
CLK
RST_n
CMD
DAT[7:0]
VCC
VCCQ
VSS1
VSSQ1
VDDIM
NC
RFU
Type
Input
Input
I/O
I/O
Supply
Supply
Supply
Supply
Description
Clock: Each cycle of the clock directs a transfer on the command line and on the data line(s). The
frequency can vary between the minimum and the maximum clock frequency.
Reset: The RST_n signal is used by the host for resetting the device, moving the device to the pre-
idle state. By default, the RST_n signal is temporarily disabled in the device. The host must set ECSD
register byte 162, bits[1:0] to 0x1 to enable this functionality before the host can use it.
Command: This signal is a bidirectional command channel used for command and response trans-
fers. The CMD signal has two bus modes: open-drain mode and push-pull mode (see Operating
Modes). Commands are sent from the MMC host to the device, and responses are sent from the
device to the host.
Data I/O: These are bidirectional data signals. The DAT signals operate in push-pull mode. By de-
fault, after power-on or assertion of the RST_n signal, only DAT0 is used for data transfer. The
MMC controller can configure a wider data bus for data transfer either using DAT[3:0] (4-bit mode)
or DAT[7:0] (8-bit mode). e·MMC includes internal pull-up resistors for data lines DAT[7:1]. Immedi-
ately after entering the 4-bit mode, the device disconnects the internal pull-up resistors on the
DAT[3:1] lines. Upon entering the 8-bit mode, the device disconnects the internal pull-ups on the
DAT[7:1] lines.
VCC: NAND interface (I/F) I/O and NAND Flash power supply.
VCCQ: e·MMC controller core and e·MMC I/F I/O power supply.
VSS: NAND I/F I/O and NAND Flash ground connection.
VSSQ: e·MMC controller core and e·MMC I/F ground connection.
Internal voltage node: At least a 0.1μF capacitor is required to connect VDDIM to ground. A 1μF ca-
pacitor is recommended. Do not tie to supply voltage or ground.
No connect: No internal connection is present.
Reserved for future use: No internal connection is present. Leave it floating externally.
Note: 1. VSS and VSSQ are connected internally.
PDF: 09005aef8523cb32
emmc_2gb-64gb_ctrd_441-wt.pdf - Rev. B 9/13 EN
5 Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2013 Micron Technology, Inc. All rights reserved.

5 Page





MTFC16GJDEC-2M-WT arduino
Micron Confidential and Proprietary
2GB, 4GB, 8GB, 16GB, 32GB, 64GB: e·MMC
Package Dimensions
Figure 7: 169-Ball VFBGA – 14.0mm x 18.00mm x 1.0mm (Package Code: ED)
169X Ø0.3
Dimensions apply to
solder balls post-reflow
on Ø0.30 SMD ball pads.
Ball A1 ID
14 12 10 8 6 4 2
13 11 9 7 5 3 1
A
13.5 CTR
6.5 CTR
18 ±0.1
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
W
Y
AA
AB
AC
AD
AE
AF
AG
AH
0.5 TYP
0.5 TYP
6.5 CTR
14 ±0.1
Note: 1. Dimensions are in millimeters.
Seating plane
0.08 A
Ball A1 ID
0.9 ±0.1
0.17 MIN
PDF: 09005aef8523cb32
emmc_2gb-64gb_ctrd_441-wt.pdf - Rev. B 9/13 EN
11
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2013 Micron Technology, Inc. All rights reserved.

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