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PDF CLC005 Data sheet ( Hoja de datos )

Número de pieza CLC005
Descripción ITU-T G.703 Cable Driver with Adjustable Outputs
Fabricantes National Semiconductor 
Logotipo National Semiconductor Logotipo



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No Preview Available ! CLC005 Hoja de datos, Descripción, Manual

August 1998
CLC005
ITU-T G.703 Cable Driver with Adjustable Outputs
General Description
National’s Comlinear CLC005 is a monolithic, high-speed
cable driver designed for the ITU-T G.703 serial digital data
transmission standard. The CLC005 drives 75transmis-
sion lines (Belden 8281 or equivalent) at data rates from DC
to over 622 Mbps. Output signal waveforms produced by the
CLC005 comply with G.703 specifications. Controlled output
rise and fall times (650 ps typical) minimize transition-
induced jitter. The output voltage swing, typically 2.0V, set by
an accurate, low-drift internal bandgap reference, delivers a
1.0V swing to back-matched and terminated 75cable. Out-
put swing is adjustable from 0.7 Vp-p to 2.2 Vp-p using exter-
nal resistors.
The CLC005’s class AB output stage consumes less power
than other designs, 185 mW with both outputs terminated,
and requires no external bias resistors. The differential in-
puts accept a wide range of digital signals from 200 mVp-p to
G.703 levels within the specified common-mode limits. All
this make the CLC005 an excellent general purpose high
speed driver for digital applications.
The CLC005 is powered from a single +5V or −5.2V supply
and comes in an 8-pin SOIC package.
Key Specifications
n 650 ps rise and fall times
n Data rates to 622 Mbps
n 200 mV differential input
n Low residual jitter (25 pspp )
Features
n No external pull-down resistors
n Adjustable output amplitude
n Differential input and output
n Low power dissipation
n Single +5V or −5.2V supply
Applications
n ITU-T G.703, Sonet/SDH, and ATM compatible driver
n Digital routers and distribution amplifiers
n Coaxial cable driver for digital transmission line
n Twisted pair driver
n Buffer applications
Typical Application
DS100144-2
© 1998 National Semiconductor Corporation DS100144
www.national.com

1 page




CLC005 pdf
Operation (Continued)
FIGURE 3. DC Coupled Input
DS100144-6
OUTPUT INTERFACING
The CLC005’s class AB output stage, Figure 6, requires no
standing current in the output transistors and therefore re-
quires no biasing or pull-down resistors. Advantages of this
arrangement are lower power dissipation and fewer external
components. The output may be either D.C. or A.C. coupled
to the load. A bandgap voltage reference sets output voltage
levels which are compatible with F100K and 10K ECL when
correctly terminated. The outputs do not have the same out-
put voltage temperature coefficient as 10K. Therefore, noise
margins will be reduced over the full temperature range
when driving 10K ECL. Noise margins will not be affected
when interfacing to F100K since F100K is fully voltage and
temperature compensated.
DS100144-7
FIGURE 4. Single Ended 50ECL Input
DS100144-8
FIGURE 5. Differential 50ECL Input
DS100144-9
FIGURE 6. Output Stage
5 www.national.com

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CLC005 arduino
PCB Layout Recommendations (Continued)
DS100144-18
DS100144-19
DS100144-20
DS100144-21
11 www.national.com

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