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PDF S6E1B84F0A Data sheet ( Hoja de datos )

Número de pieza S6E1B84F0A
Descripción Microcontroller
Fabricantes Cypress Semiconductor 
Logotipo Cypress Semiconductor Logotipo



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PRELIMINARY
S6E1B8 Series
32-bit ARM® Cortex®-M0+
FM0+ Microcontroller
The S6E1B8 Series is a series of highly integrated 32-bit microcontrollers designed for embedded controllers aiming at low power
consumption and low cost. This series has the ARM Cortex-M0+ Processor with on-chip Flash memory and SRAM, and consists of
peripheral functions such as various timers, LCD controller (LCDC), AES, ADC and communication interfaces (UART, CSIO (SPI),
I2C, I2S, Smart Card, and USB). The products which are described in this data sheet are placed into TYPE2-M0+ product categories
in "FM0+ Family Peripheral Manual".
Features
32-bit ARM Cortex-M0+ Core
Processor version: r0p1
Maximum operating frequency: 40.8 MHz
Nested Vectored Interrupt Controller (NVIC): 1 NMI
(non-maskable interrupt) and 24 peripheral interrupt with 4
selectable interrupt priority levels
24-bit System timer (Sys Tick): System timer for OS task
management
Bit Band Operation
Compatible with Cortex-M3 bit band operation.
On-Chip Memory
Flash memory
Up to 512 K+48 Kbytes
Dual bank:
upper bank : 512 Kbytes(64 Kbytes x 8)
lower bank : 48 Kbytes(8 Kbytes x 6)
Read cycle: 0 wait-cycle
Security function for code protection
SRAM
The on-chip SRAM of this series has one independent SRAM .
Up to SRAM: 60 K+4 Kbytes
4Kbytes: can retain value in Deep Standby Mode
USB Interface
USB interface is composed of Device and Host
PLL for USB is built-in, USB clock can be generated by
multiplication of Main clock.
USB Device
USB 2.0 Full-Speed supported
Max 6 EndPoint supported
EndPoint 0 is control transfer
EndPoint 1, 2 can be selected Bulk-transfer,
Interrupt-transfer or Isochronous-transfer
EndPoint 3 to 5 can select Bulk-transfer or
Interrupt-transfer
EndPoint 1 to 5 comprise Double Buffer
The size of each EndPoint is according to the follows
EndPoint 0, 2 to 5 : 64 bytes
EndPoint 1 : 256 bytes
USB host
USB 2.0 Full/Low-Speed supported
Bulk-transfer, Interrupt-transfer and Isochronous-transfer
support
USB Device connected/disconnected automatically detect
IN/OUT token handshake packet automatically
Max 256-byte packet-length supported
Wake-up function supported
LCD Controller (LCDC)
Selectable from 44 SEG × 4 COM (Max) or 40 SEG × 8
COM (Max)
Internal Charge pump can generate 4.6 V at most
Internal divide resistor is contained (selectable from 10 k
or 100 kfor the resistor value)
LCD drive power supply (bias) pin (VV4 to VV0)
Interrupt function synchronized with the LCD module frame
frequency
With blinking function
Inverted display function
Multi-Function Serial Interface (Max 8channels)
128 bytes with Tx/Rx FIFO in all channels (The number of
FIFO steps varies depending on the settings of the
communication mode or bit length.)
The operation mode of each channel can be selected from
one of the following.
UART
CSIO (CSIO is known to many customers as SPI)
I2C
UART
Full duplex double buffer
Parity can be enabled or disabled.
Built-in dedicated baud rate generator
External clock available as a serial clock
Various error detection functions (parity errors, framing
errors, and overrun errors)
CSIO (also known as SPI)
Full duplex double buffer
Built-in dedicated baud rate generator
Overrun error detection function
Serial chip select function (ch1 and ch3 only)
Data length: 5 to 16 bits
Cypress Semiconductor Corporation
Document Number: 001-99223 Rev.**
• 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Revised August 31, 2015

1 page




S6E1B84F0A pdf
PRELIMINARY
S6E1B8 Series
Table of Contents
Features................................................................................................................................................................................... 1
1. Product Lineup............................................................................................................................................................... 7
2. Packages......................................................................................................................................................................... 8
3. Pin Assignment .............................................................................................................................................................. 9
4. List of Pin Functions.................................................................................................................................................... 12
5. I/O Circuit Type............................................................................................................................................................. 36
6. Handling Precautions .................................................................................................................................................. 46
6.1 Precautions for Product Design ................................................................................................................................... 46
6.2 Precautions for Package Mounting.............................................................................................................................. 47
6.3 Precautions for Use Environment ................................................................................................................................ 49
7. Handling Devices ......................................................................................................................................................... 50
8. Block Diagram .............................................................................................................................................................. 53
9. Memory Map ................................................................................................................................................................. 54
10. Pin Status in Each CPU State...................................................................................................................................... 57
11. Electrical Characteristics ............................................................................................................................................ 67
11.1 Absolute Maximum Ratings......................................................................................................................................... 67
11.2 Recommended Operating Conditions.......................................................................................................................... 68
11.3 DC Characteristics....................................................................................................................................................... 69
11.3.1 Current Rating.............................................................................................................................................................. 69
11.3.2 Pin Characteristics ....................................................................................................................................................... 74
11.3.3 LCD Characteristic ....................................................................................................................................................... 75
11.4 AC Characteristics....................................................................................................................................................... 79
11.4.1 Main Clock Input Characteristics.................................................................................................................................. 79
11.4.2 Sub Clock Input Characteristics ................................................................................................................................... 80
11.4.3 Built-in CR Oscillation Characteristics.......................................................................................................................... 81
11.4.4 Operating Conditions of Main PLL (In the Case of Using the Main Clock as the Input Clock of the PLL) .................... 82
11.4.5 Operating Conditions of Main PLL (In the Case of Using the Built-in High-Speed CR Clock as the
Input Clock of the Main PLL) ........................................................................................................................................ 82
11.4.6 Reset Input Characteristics .......................................................................................................................................... 83
11.4.7 Power-on Reset Timing................................................................................................................................................ 83
11.4.8 Base Timer Input Timing .............................................................................................................................................. 84
11.4.9 CSIO/SPI/UART Timing ............................................................................................................................................... 85
11.4.10 External Input Timing.............................................................................................................................................. 102
11.4.11 I2C Timing............................................................................................................................................................... 103
11.4.12 I2S Timing ............................................................................................................................................................... 104
11.4.13 Smart Card Interface Characteristics...................................................................................................................... 105
11.4.14 SW-DP Timing........................................................................................................................................................ 106
11.5 12-bit A/D Converter.................................................................................................................................................. 107
11.6 USB Characteristics .................................................................................................................................................. 110
11.7 Low-Voltage Detection Characteristics...................................................................................................................... 115
11.7.1 Low-Voltage Detection Reset..................................................................................................................................... 115
11.7.2 Low-Voltage Detection Interrupt................................................................................................................................. 116
11.7.3 Low-Voltage Detection Interrupt 2.............................................................................................................................. 117
11.8 Flash Memory Write/Erase Characteristics ............................................................................................................... 118
11.9 Return Time from Low-Power Consumption Mode.................................................................................................... 119
11.9.1 Return Factor: Interrupt/WKUP .................................................................................................................................. 119
11.9.2 Return Factor: Reset.................................................................................................................................................. 121
12. Ordering Information ................................................................................................................................................. 123
Document Number: 001-99223 Rev.**
Page 5 of 128

5 Page





S6E1B84F0A arduino
FPT-120P-M21
PRELIMINARY
(TOP VIEW)
S6E1B8 Series
VCC
P50/INT00_0/SIN3_1/VV4
P51/INT01_0/SOT3_1/VV3
P52/INT02_0/SCK3_1/VV2
P53/SIN6_0/TIOA1_2/INT07_2/VV1
P54/SOT6_0/TIOB1_2/INT18_1/VV0
P55/SCK6_0/ADTG_1/INT19_1/SEG39
P56/SIN1_0/INT08_2/MI2SMCK6_1/SEG38/WKUP9/CEC1_1
P57/SOT1_0
P58/SCK1_0
P59/SIN7_0/INT16_1
P5A/SOT7_0/INT16_2
P5B/SCK7_0/INT17_2
P30/TIOB0_1/SCS60_1/INT03_2/MI2SWS6_1/COM7/SEG43/WKUP4
P31/TIOB1_1/SCK6_1/MI2SCK6_1/INT04_2/COM6/SEG42
P32/TIOB2_1/SOT6_1/MI2SDO6_1/INT05_2/COM5/SEG41
P33/INT04_0/TIOB3_1/SIN6_1/MI2SDI6_1/ADTG_6/COM4/SEG40
P34/SCS61_1/FRCK0_0/TIOB4_1
P35/SCS62_1/IC03_0/TIOB5_1/INT08_1/SEG37
P36/IC02_0/SIN5_2/INT09_1/WKUP11
P37/IC01_0/SOT5_2/INT10_1
P38/IC00_0/SCK5_2/INT11_1
P39/DTTI0X_0/ADTG_2/TIOB4_0/INT06_0/COM3
P3A/RTO00_0/TIOA0_1/INT07_0/RTCCO_2/SUBOUT_2/IC1_CIN_0/COM2
P3B/RTO01_0/TIOA1_1/IC1_DATA_0/COM1
P3C/RTO02_0/TIOA2_1/INT18_2/IC1_RST_0/COM0
P3D/RTO03_0/TIOA3_1/IC1_VPEN_0/SEG36
P3E/RTO04_0/TIOA4_1/INT19_2/IC1_VCC_0/SEG35/WKUP8
P3F/RTO05_0/TIOA5_1/IC1_CLK_0/SEG34
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
LQFP - 120
90 VSS
89 P20/AN19/INT05_0/CROUT_0/SEG10
88 P21/AN18/SIN0_0/INT06_1/WKUP2/SEG11
87 P22/AN17/SOT0_0/TIOB7_1/SEG12
86 P23/AN16/SCK0_0/TIOA7_1/RTO00_1/SEG13
85 P24/SIN2_1/RTO01_1/INT17_1
84 P25/SOT2_1/RTO02_1
83 P26/SCK2_1/RTO03_1
82 P27/AN15/RTO04_1/TIOA6_2/INT02_2
81 P28/ADTG_4/RTO05_1/TIOB6_2
80 P1E/AN14/RTS4_1/ADTG_5/FRCK0_1/INT23_2
79 P1D/AN13/CTS4_1/DTTI0X_1/INT22_2/SEG14
78 P1C/AN12/SCK4_1/IC03_1/INT21_2/SEG15
77 P1B/AN11/SOT4_1/IC02_1/INT20_2/SEG16
76 P1A/AN10/SIN4_1/IC01_1/INT05_1/SEG17
75 P19/AN09/SCK2_2/IC00_1/SEG18
74 P18/AN08/SOT2_2/SEG19
73 AVRH
72 AVRL
71 AVSS
70 AVCC
69 P17/AN07/SIN2_2/INT04_1/SEG20
68 P16/AN06/SCK0_1/INT15_0/SEG21
67 P15/AN05/IC1_CIN_1/SOT0_1/IC03_2/INT14_0/SEG22
66 P14/AN04/IC1_DATA_1/RTS1_1/SIN0_1/INT03_1/IC02_2/SEG23
65 P13/AN03/IC1_RST_1/SCK1_1/RTCCO_1/IC01_2/SUBOUT_1/SEG24
64 P12/AN02/IC1_VPEN_1/SOT1_1/IC00_2/SEG25
63 P11/AN01/IC1_VCC_1/SIN1_1/INT02_1/FRCK0_2/WKUP1/SEG26
62 P10/AN00/IC1_CLK_1/CTS1_1/SEG27
61 VCC
Note:
The number after the underscore ("_") in a pin name such as XXX_1 and XXX_2 indicates the relocated port number. The
channel on such pin has multiple functions, each of which has its own pin name. Use the Extended Port Function Register
(EPFR) to select the pin to be used.
Document Number: 001-99223 Rev.**
Page 11 of 128

11 Page







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