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PDF CHV2241 Data sheet ( Hoja de datos )

Número de pieza CHV2241
Descripción K-band Oscillator with integrated Q-band Harmonic Mixer
Fabricantes United Monolithic Semiconductors 
Logotipo United Monolithic Semiconductors Logotipo



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CHV2241
K-band Oscillator with integrated Q-band Harmonic
Mixer
GaAs Monolithic Microwave IC
Description
The CHV2241 is a monolithic multifunction
proposed for frequency generation and
transposition. It integrates a K-band oscillator, a
Q-band harmonic mixer and buffer amplifiers.
For performance optimisation, an external port
(ERC) allows a passive resonator coupling to
the oscillator (at half output frequency). All the
active devices are internally self biased.
The circuit is manufactured with the P-HEMT
process : 0.25µm gate length, via holes through
the substrate, air bridges and electron beam
gate lithography.
It is available in chip form.
Main Features
n K-band Oscillator + Q-band harmonic
mixer
n External resonator for centre frequency
control and phase noise optimisation
n High quality oscillator when coupled to
a dielectric resonator
n Low conversion loss
n High temperature range
n On chip self biasing
n Automatic assembly oriented
n Chip size 1.82 x 0.97 x 0.1 mm
+V -V
RF
F_lo = (F_rf - F_if)/2
HIGH Q ERC
RESONATOR
x2
LO_out_aux
IF
Multifunction block diagram
0
-1
-2
-3
-4
-5
-6
-7
-8
-9
-10
37
37,5
38
RF Frequency (GHz)
38,5
Typical conversion loss characteristic
Main Characteristics
Tamb = +25°C
Symbol
Parameter
F_rf RF frequency
F_lo Oscillator frequency
Pn Oscillator phase noise @ 100kHz (38GHz)
Lc Conversion loss
Min Typ Max
37.5 38.25 39
(F_rf - F_if)/2
-100
7
Unit
GHz
dBc/Hz
dB
ESD Protections : Electrostatic discharge sensitive device observe handling precautions !
39
Ref. : DSCHV22411074 -15-Mar.-01
1/8 Specifications subject to change without notice
united monolithic semiconductors S.A.S.
Route Départementale 128 - B.P.46 - 91401 Orsay Cedex France
Tel. : +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09

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CHV2241 pdf
K-band Oscillator / Q-band Mixer
Typical Assembly and Bias Configuration
CHV2241
µ-strip line
L_erc
3
2
1
4
5
µ-strip line
6
L_rf
7
13 12 11 10 9 8
>= 120pF
>= 120pF
+V -V
DC and control lines
IF
This drawing shows an example of assembly and bias configuration. All the
transistors are internally self biased. The positive and negative voltages can be
respectively connected together (see drawing) according to the recommended
values given in the electrical characteristics table.
For the RF pads the equivalent wire bonding inductances (diameter=25µm) have
to be according to the following recommendation.
Port
ERC (2)
LO_OUT_AUX (4)
Optional
RF (6)
Equivalent inductance
(nH)
L_erc = 0.4
Not critical , < 1nH
L_rf = 0.28
Approximative wire
length (mm)
0.5
0.35
For a micro-strip configuration a hole in the substrate is recommended for chip
assembly.
Ref. : DSCHV22411074 -15-Mar.-01
5/8 Specifications subject to change without notice
Route Départementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE
Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09

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