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PDF LC88F5LA4ACS Data sheet ( Hoja de datos )
| Número de pieza | LC88F5LA4ACS | |
| Descripción | 16-bit 1-chip Microcontroller | |
| Fabricantes | ON Semiconductor | |
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Ordering number : ENA1860
LC88F5LA4ACS
CMOS IC
FROM 96K byte, RAM 6K byte on-chip
16-bit 1-chip Microcontroller
http://onsemi.com
Overview
The LC88F5LA4ACS is a 16-bit microcomputer that, centered around an Xstromy16 CPU, integrates on a single chip a
number of hardware features such as 96K-byte flash ROM (onboard programmable), 6K-byte RAM, six 16-bit timers, a
base timer serving as a time-of-day clock, a real time clock, two synchronous SIO interfaces with automatic
transmission capability, a single master I2C/synchronous SIO interface, a slave I2C/synchronous SIO interface, two
asynchronous SIO (UART) interfaces, a 4-channel 12-bit resolution AD converter, a watchdog timer, a system clock
frequency divider, a 38-source (24 modules) 13-vector interrupt feature, and on-chip debugger feature.
Features
Xstromy16 CPU
• 4G-byte address space
• General-purpose registers: 16 bits × 16registers
Flash ROM
• Capable of onboard programming with a wide range of voltage levels (2.6 to 3.6V).
• Block-erasable in 128 or 1K byte units.
• Data written in 2-byte units.
• 98304 × 8 bits
RAM
• 6144 × 8 bits
* This product is licensed from Silicon Storage Technology, Inc. (USA).
Semiconductor Components Industries, LLC, 2013
May, 2013
Ver.1.00
30211HKIM 20100223-S00001 No.A1860-1/33
1 page  
LC88F5LA4ACS
Standby Function
• HALT mode: Halts instruction execution while allowing the peripheral circuits to continue operation.
1) Oscillation is not halted automatically.
2) Released by a system reset or occurrence of an interrupt.
• HOLD mode: Suspends instruction execution and the operation of the peripheral circuits.
1) OSC1, RC and OSC0 oscillators automatically stop.
2) There are the six ways of releasing the HOLD mode.
(1) Setting the reset pin to the low level
(2) Setting at least one of the INT0, INT1, INT2, INT3, INT4, INT5, INT6, and INT7 pins to the specified level
(3) Having an interrupt source established at port 0
(4) Having an interrupt established at SIO0 or SIO1
(5) Having an interrupt established at UART2
• HOLDX mode: Suspends instruction execution and the operation of the peripheral circuits except those which run
on OSC0.
1) OSC1 and RC oscillations automatically stop.
2) OSC0 maintains the state that is established when the HOLDX mode is entered.
3) There are seven ways of releasing the HOLDX mode.
(1) Setting the reset pin to the low level
(2) Setting at least one of the INT0, INT1, INT2, INT3, INT4, INT5, INT6, and INT7 pins to the specified level
(3) Having an interrupt source established at port 0
(4) Having an interrupt source established at the base timer circuit
(5) Having an interrupt established at SIO0 or SIO1
(6) Having an interrupt established at UART2
.
On-chip debugger function
• Supports software debugging with the IC mounted on the target board.
• Supports source line debugging and tracing functions, and breakpoint setting and real time display.
• Single-wire communication
Power supply voltage
• VDD1, 2 : 2.2 to 3.6V.
• VDD3
: (I/O) 1.6 to 3.6V.
* Voltage of VDD3 must be lower than VDD1.
Package Form
• WLP46 (3.03 × 3.03): Lead-free and halogen-free type
Development Tools
• On-chip debugger: EOCUIF1 + LC88F5LA4A
No.A1860-5/33
5 Page 
LC88F5LA4ACS
Example 2: When data is being backed up in the HOLD mode, the H level output at any ports is not sustained and is
unpredictable.
LSI
Power
supply
For backup
VDD1
VDDA
VDD2
Power
supply
VDD3
VSS1 VSS2 VSSA
Absolute Maximum Ratings at Ta = 25°C, VSS1 = VSS2 = VSSA = 0V
Parameter
Maximum supply
voltage
Symbol
VDD max
Applicable Pin
/Remarks
VDD1, VDD2, VDDA
Conditions
VDD1=VDD2=VDDA
VDD[V]
min
-0.3
VDD3 max
VDD3
VDD3≤VDD
-0.3
Specification
typ max
unit
+4.0
+4.0
Input voltage
VI(1)
CF1, RESB
-0.3
VDD
+0.3
V
Input/output
voltage
VIO(1)
Ports 0, 1, 3
Port 6
PC0, PC1
-0.3 VDD
+0.3
VIO(2)
Ports 2
VDD3≤VDD
-0.3 VDD3
+0.3
Peak output
current
IOPH (1)
P04 to P07, P62
Ports 1, 2, 3
CMOS output selected
Per applicable pin
-7.5
IOPH (2)
P00 to P03
P60 to P61
Per applicable pin
-4.5
Average
output
IOMH (1)
P04 to P07, P62
Ports 1, 2, 3
CMOS output selected
Per applicable pin
-5
current
(Note 1-1)
IOMH (2)
P00 to P03
P60 to P61
Per applicable pin
-2.5
Total output
current
ΣIOAH (1)
P60 to P61
P00 to P03
Total of currents at
applicable pins
-10 mA
ΣIOAH (2)
P04 to P07
P31 to p37
Total of currents at
applicable pins
-15
ΣIOAH (3)
Port 1
P30, P62
Total of currents at
applicable pins
-15
ΣIOAH (4)
P04 to P07, P62
Ports 1, 3
Total of currents at
applicable pins
-30
ΣIOAH (5)
Port 2
Total of currents at
applicable pins
-15
Note 1-1: Average output current refers to the average of output currents measured for a period of 100ms.
Continued on next page.
No.A1860-11/33
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet LC88F5LA4ACS.PDF ] | |
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