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PDF XR77103 Data sheet ( Hoja de datos )

Número de pieza XR77103
Descripción Universal PMIC 3-Output Programmable Buck Regulator
Fabricantes EXAR 
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XR77103
Universal PMIC
3-Output Programmable Buck Regulator
Description
The XR77103 features three synchronous wide input range high
efficiency buck converters. Each converter is digitally programmable
requiring minimal external components thus providing the smallest
size solution possible.
The converters can operate in 5V, 9V, and 12V systems and have
integrated power switches. The output voltage of each converter
can be adjusted by programming the values in the VOUT setting
registers through I2C interface. The adjustable range is 0.8 to 6V with
50mV resolution. The output voltage also can be set externally using
an external resistor divider. Output sequence among the outputs,
soft-start time and the peak inductor current limit are also set
through I2C.
The switching frequency of the converters can either be set with I2C
or can be synchronized to an external clock connected to SYNC pin
if needed. The switching regulators are designed to operate from
300kHz to 2.2MHz. Each converter operates in phase or out-of-phase
according to the value in the phase setting register. This can minimize
the input filter requirements.
XR77103 features a supervisor circuit that monitors each
converter output. PGOOD pin is asserted once sequencing is done,
all outputs are reported in regulation, and the reset timer expires.
The polarity of the signal is active high.
XR77103 also features a light load pulse skipping mode (PSM). It is
set through I2C. The PSM mode allows for a reduction on the input
power supplied to the system when the host processor is in stand-by
(low activity) mode.
FEATURES
■■ 4.5V to 14V wide input supply voltage
range
■■ Built-In MOSFET and synchronous rectifier
■■ I2C programmable supplies
Output voltage (0.8 to 6V)
Power on sequence
Soft-start timing
Switching frequency (300kHz to
2.2MHz)
Individual current limit
Optional power saving mode at light
loads
■■ Non volatile memory (NVM) with up to
10,000 times write operation
■■ 0.8V, high accuracy reference (1%)
■■ Current-mode control with simple
compensation circuit
■■ External synchronization
■■ Power good
■■ Protection
Thermal shutdown
Overvoltage transient protection
Overcurrent protection
■■ 32-pin 4mm x 4mm TQFN package
APPLICATIONS
■■ FPGA and DSP supplies
■■ Video processor supplies
■■ Applications processor power
REV1B
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1 page




XR77103 pdf
XR77103
Electrical Characteristics (Continued)
TA = 25°C, VIN = 12V, EN = VCC, fSW = 1MHz, unless otherwise specified. Limits applying over the full operating temperature
range are denoted by a •.
Symbol
Parameter
Power Good Reset Generator
VUVBUCK
Threshold voltage for buck
under voltage
tPG_DEGLITCH
tON_HICCUP
Deglitch time
Hiccup mode on time
tOFF_HICCUP
Hiccup mode off time
tRP Minimum reset period
RPG
Power good pull-down
on resistance
Input Threshold (SDA, SCL, nWR, A0)
VIH Input threshold high
VIL Input threshold low
A0, nWR pull up resistor
Input Threshold (SYNC, EN)
VIH Input threshold high
VIL Input threshold low
Conditions
• Min Typ Max Units
Output falling,
(disabled after tON_HICCUP)
Output rising, (PG will be asserted)
Rising and falling
VUVBUCKX asserted
Once tOFF_HICCUP elapses,
all converters will start up again
85 %
90
11 ms
12 ms
15 ms
1s
14 50
Ω
VINPUT rising, VL = 3.3V
VINPUT falling, VL = 3.3V
VINPUT rising
VINPUT falling
• 1.52
1.83
• 0.98
1.24
100
• 2.07
• 1.36
2.53
1.67
V
V
V
V
REV1B
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5 Page





XR77103 arduino
XR77103
Typical Performance Characteristics (Continued)
Efficiency
fSW = 1MHz, TA = 25°C, no airflow, only individual channel operating, inductor losses are included.
100
90
80
70
60
50
40
30
20
10
0
0
0.4 0.8 1.2 1.6
IOUT (A)
Figure 15. Efficiency Channel 1,
12VIN 3.3VOUT
2
100
90
80
70
60
50
40
30
20
10
0
0
0.4 0.8 1.2 1.6
IOUT (A)
Figure 16. Efficiency Channel 1,
5VIN 3.3VOUT
2
100
90
80
70
60
50
40
30
20
10
0
0
0.4 0.8 1.2 1.6
IOUT (A)
Figure 17. Efficiency Channel 2,
12VIN 1.8VOUT
2
100
90
80
70
60
50
40
30
20
10
0
0
0.4 0.8 1.2 1.6
IOUT (A)
Figure 18. Efficiency Channel 2,
5VIN 1.8VOUT
2
100
90
80
70
60
50
40
30
20
10
0
0
0.4 0.8 1.2 1.6
IOUT (A)
Figure 19. Efficiency Channel 3,
12VIN 2.5VOUT
2
REV1B
100
90
80
70
60
50
40
30
20
10
0
0
0.4 0.8 1.2 1.6
IOUT (A)
Figure 20. Efficiency Channel 3,
5VIN 1.2VOUT
2
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