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PDF S29AL008J Datasheet ( Hoja de datos )

Número de pieza S29AL008J
Descripción Boot Sector Flash Memory
Fabricantes Cypress Semiconductor 
Logotipo Cypress Semiconductor Logotipo

Total 30 Páginas
		
S29AL008J Hoja de datos, Descripción, Manual
S29AL008J
Distinctive Characteristics
8 Mbit (1 M x 8-Bit/512 K x 16-Bit), 3 V
Boot Sector Flash
Architectural Advantages
Single Power Supply Operation
– Full voltage range: 2.7 to 3.6 volt read and write operations for
battery-powered applications
Manufactured on 110 nm Process Technology
– Fully compatible with 200 nm S29AL008D
Secured Silicon Sector region
– 128-word/256-byte sector for permanent, secure identification
through an 8-word/16-byte random Electronic Serial Number
accessible through a command sequence
– May be programmed and locked at the factory or by the customer
Flexible Sector Architecture
– One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and fifteen 64 Kbyte
sectors (byte mode)
– One 8 Kword, two 4 Kword, one 16 Kword, and fifteen 32 Kword
sectors (word mode)
Sector Group Protection Features
– A hardware method of locking a sector to prevent any program or
erase operations within that sector
– Sectors can be locked in-system or via programming equipment
– Temporary Sector Unprotect feature allows code changes in
previously locked sectors
Unlock Bypass Program Command
– Reduces overall programming time when issuing multiple program
command sequences
Top or Bottom Boot Block Configurations Available
Compatibility with JEDEC standards
– Pinout and software compatible with single-power supply Flash
– Superior inadvertent write protection
Performance Characteristics
High Performance
– Access times as fast as 55 ns
– Extended temperature range (–40°C to +125°C)
Ultra Low Power Consumption (typical values at 5 MHz)
– 0.2 µA Automatic Sleep mode current
– 0.2 µA standby mode current
– 7 mA read current
– 20 mA program/erase current
Cycling Endurance: 1,000,000 cycles per sector typical
Data Retention: 20 years typical
Package Options
48-ball Fine-pitch BGA
48-pin TSOP
Software Features
CFI (Common Flash Interface) Compliant
– Provides device-specific information to the system, allowing host
software to easily reconfigure for different Flash devices
Erase Suspend/Erase Resume
– Suspends an erase operation to read data from, or program data
to, a sector that is not being erased, then resumes the erase
operation
Data# Polling and Toggle Bits
– Provides a software method of detecting program or erase
operation completion
Hardware Features
Ready/Busy# Pin (RY/BY#)
– Provides a hardware method of detecting program or erase cycle
completion
Hardware Reset Pin (RESET#)
– Hardware method to reset the device to reading array data
WP# input pin
– For boot sector devices: at VIL, protects first or last 16 Kbyte
sector depending on boot configuration (top boot or bottom boot)
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 002-00778 Rev. *K
• San Jose, CA 95134-1709 • 408-943-2600
Revised December 11, 2015

1 page

S29AL008J pdf
3. Connection Diagrams
Figure 3.1 48-pin Standard TSOP (TS048)
A15
A14
A13
A12
A11
A10
A9
A8
NC
NC
WE#
RESET#
NC
WP#
RY/BY#
A18
A17
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
Figure 3.2 48-ball Fine-pitch BGA (VBK048)
(Top View, Balls Facing Down)
A6 B6 C6
A13 A12 A14
A5 B5 C5
A9 A8 A10
A4 B4
WE# RESET#
C4
NC
A3 B3
RY/BY# WP#
C3
A18
A2 B2 C2
A7 A17 A6
A1 B1 C1
A3 A4 A2
D6 E6 F6 G6 H6
A15 A16 BYTE# DQ15/A-1 VSS
D5 E5 F5 G5 H5
A11 DQ7 DQ14 DQ13 DQ6
D4 E4 F4 G4 H4
NC DQ5 DQ12 VCC DQ4
D3 E3 F3 G3 H3
NC DQ2 DQ10 DQ11 DQ3
D2 E2 F2 G2 H2
A5 DQ0 DQ8 DQ9 DQ1
D1 E1 F1 G1 H1
A1 A0 CE# OE# VSS
S29AL008J
A16
BYTE#
VSS
DQ15/A-1
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
VCC
DQ11
DQ3
DQ10
DQ2
DQ9
DQ1
DQ8
DQ0
OE#
VSS
CE#
A0
Document Number: 002-00778 Rev. *K
Page 5 of 52

5 Page

S29AL008J arduino
S29AL008J
7.8 Output Disable Mode
When the OE# input is at VIH, output from the device is disabled. The output pins are placed in the high impedance state.
S29AL008J Top Boot Block Sector Addresses
Sector A18 A17 A16 A15 A14 A13 A12
Sector Size
(Kbytes/
Kwords)
Address Range (in hexadecimal)
(x8)
Address Range
(x16)
Address Range
SA0 0 0 0 0 X X X
64/32
00000h–0FFFFh
00000h–07FFFh
SA1 0 0 0 1 X X X
64/32
10000h–1FFFFh
08000h–0FFFFh
SA2 0 0 1 0 X X X
64/32
20000h–2FFFFh
10000h–17FFFh
SA3 0 0 1 1 X X X
64/32
30000h–3FFFFh
18000h–1FFFFh
SA4 0 1 0 0 X X X
64/32
40000h–4FFFFh
20000h–27FFFh
SA5 0 1 0 1 X X X
64/32
50000h–5FFFFh
28000h–2FFFFh
SA6 0 1 1 0 X X X
64/32
60000h–6FFFFh
30000h–37FFFh
SA7 0 1 1 1 X X X
64/32
70000h–7FFFFh
38000h–3FFFFh
SA8 1 0 0 0 X X X
64/32
80000h–8FFFFh
40000h–47FFFh
SA9 1 0 0 1 X X X
64/32
90000h–9FFFFh
48000h–4FFFFh
SA10
1
0
1
0
X
X
X
64/32
A0000h–AFFFFh
50000h–57FFFh
SA11
1
0
1
1
X
X
X
64/32
B0000h–BFFFFh
58000h–5FFFFh
SA12
1
1
0
0
X
X
X
64/32
C0000h–CFFFFh
60000h–67FFFh
SA13
1
1
0
1
X
X
X
64/32
D0000h–DFFFFh
68000h–6FFFFh
SA14
1
1
1
0
X
X
X
64/32
E0000h–EFFFFh
70000h–77FFFh
SA15
1
1
1
1
0
X
X
32/16
F0000h–F7FFFh
78000h–7BFFFh
SA16
1
1
1
1
1
0
0
8/4
F8000h–F9FFFh
7C000h–7CFFFh
SA17
1
1
1
1
1
0
1
8/4
FA000h–FBFFFh
7D000h–7DFFFh
SA18
1
1
1
1
1
1
X
16/8
FC000h–FFFFFh
7E000h–7FFFFh
Note
Address range is A18:A-1 in byte mode and A19:A0 in word mode. See Word/Byte Configuration on page 8.
Secured Silicon Sector Addresses (Top Boot)
Sector Size (bytes/words)
256/128
x8 Address Range
FFF00h–FFFFFh
x16 Address Range
7FF80h–7FFFFh
Document Number: 002-00778 Rev. *K
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