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PDF PI3WVR12612 Datasheet ( Hoja de datos )

Número de pieza PI3WVR12612
Descripción DisplayPort 1.2 Video Switch
Fabricantes Pericom Semiconductor 
Logotipo Pericom Semiconductor Logotipo

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PI3WVR12612 Hoja de datos, Descripción, Manual
PI3WVR12612
HDMI 2.0, DisplayPort 1.2 Video Switch
Features
ÎÎ4-lane, 1:2 mux/demux that will support RBR, HBR1, or
HBR2
ÎÎData rate: 3.4 Gbps to 6.0 Gbps for high data channels
ÎÎ1-channel 1:2 mux/demux for HPD signal
ÎÎDifferential switch matrix for DP AUX and HDMI DDC
ÎÎsupports 720 Mbps high-speed DP AUX
ÎÎ-2.0 dB Insertion Loss for Dx channels @ 3 GHz
ÎÎ-3 dB Bandwidth for Dx channels: 4.1 GHz
ÎÎReturn loss for Dx channels @ 3 GHz: -12 dB
ÎÎLow Crosstalk for high speed channels: -25 dB@ 6 Gbps
ÎÎLow Off Isolation for high speed channels: -24dB@ 6 Gbps
ÎÎLow channel-to-channel skew, 35ps max
ÎÎLow Bit-to-Bit Skew, 5ps typ (between '+' and '-' bits)
ÎÎVDD Operating Range: 3.3V +/-10%
ÎÎESD Tolerance: 2kV HBM
ÎÎPackaging (Pb-free & Green):
-50-ball TFBGA (NEE)
-52-pin TQFN (ZL52)
Description
Pericom Semiconductor’s PI3WVR12612 is a multi-standard
video switch with wide voltage range capability. It supports
DisplayPort 1.2, HDMI 2.0, and emerging and proprietary standards.
PI3WVR12612 can pass high-speed signals up to 1.2 V peak-
to-peak differential with a common-mode voltage from 0 to
3.4V. The wide voltage range allows DC-coupled multi-standard
operation. Eliminating AC coupling capacitors saves board space
and improves signal integrity for dense PCB designs.
The high speed channels can also pass 0V-3.3V CMOS signals up
to 1MHz.
In addition to four high-speed lanes, PI3WVR12612 also switch-
es AUX, DDC, and HPD signals.
Application
Routing of DisplayPort and HDMI signals with low signal at-
tenuation between source and sink.
Block Diagram
D0+
D0-
D1+
D1-
D2+
D2-
D3+
D3-
D0+A
D0-A
D1+A
D1-A
D2+A
D0-A
D3+A
D3-A
D0+B
D0-B
D1+B
D1-B
D2+B
D2-B
D3+B
D3-B
AUX+
SCL
AUX-
SDA
HPD
AUX+A
AUX+B
SCL_A
SCL_B
AUX-A
AUX-B
SDA_A
SDA_B
HPDA
HPDB
All trademarks are property of their respective owners.
DDC_AUX_SEL
GPU_SEL
OE
15-0175
Logic
Control
1
www.pericom.com 12/03/15

1 page

PI3WVR12612 pdf
PI3W VR12612
HDMI 2.0, DisplayPort 1.2 Video Switch
Maximum Ratings
(Above which useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ........................................................... –65°C to +150°C
Supply Voltage to Ground Potential ....................................–0.5V to +4.2V
DC Input Voltage .......................................................................–0.5V to VDD
High Speed Data Channel........................................................ –0.5V to 3.8V
HPD_x, SDA_x, SCL_x............................................................. -0.5V to 5.5V
DC Output Current ..............................................................................120mA
Power Dissipation .................................................................................... 0.5W
Note: Stresses greater than those listed under MAXI-
MUM RATINGS may cause permanent damage to
the device. This is a stress rating only and functional
operation of the device at these or any other conditions above
those indicated in the operational sections of this specification
is not implied. Exposure to absolute maximum rating condi-
tions for extended periods may affect reliability.
DC Electrical
3.3V ±10%)
Characteristics
for
Switching
over
Operating
Range
(TA
=
–40°C
to
+105°C,
VDD
=
Parameter Description
VIH Input HIGH Voltage (OE, GPU_SEL)
VIL Input LOW Voltage (OE, GPU_SEL)
VIH Input HIGH Voltage (DDC_AUX_SEL)
VIM
Input Mid-Level Voltage (DDC_AUX_
SEL)
VIL Input LOW Voltage (DDC_AUX_SEL)
VIK Clamp Diode Voltage (HS Channel)
VIK Clamp Diode Voltage (Aux, Cntrl )
IIH Input HIGH Current (All Control Pins)
IIL Input LOW Current (All Control Pins)
IOFF_SB
I/O leakage when part is off for sideband
signals only (DDC, AUX, HPD)
RON_HS
On resistance between input to output for
high speed signals
RON_AUX
RON_DDC
RON_HPD
VAUX_SS
VHPD_I
VHPD_O
VSDA_X
VPASS
(SDA_X)
VSCL_X
On resistance between input to output for
side-band signals (AUX)
On resistance between input to output for
DDC channel
On resistance between input to output for
HPD channel
Signal Swing Tolerance in Aux path
Input voltage on HPD path
Output voltage tolerance on HPD path
Input Voltage on SDA path
Switch output voltage tolerance input
Input Voltage on SCL path
Test Conditions(1)
Min
Guaranteed HIGH level
1.5
Guaranteed LOW level
Guaranteed HIGH level
2.65
Guaranteed MID level
VDD/2-
300mV
Guaranteed LOW level
-0.5
VDD = Max., IIN = –18mA
VDD = Max., IIN = –18mA
VDD = Max., VIN = VDD
VDD = Max., VIN = GND
VDD = 0V, VINPUT = 0V to
3.6V
VINPUT,cm = 0V to 3.4V,
VINPUT,diff < 1.2Vp-p,diff,
VDD = 3.0V, IINPUT = 20mA
VDD = 3.0V, Vinput = 0 to 3.3V,
IINPUT = 20mA
VDD = 3.0V, Vinput = 0V,
IINPUT = 20mA
VDD = 3.0V, Vinput = 0 to 3.0V,
IINPUT = 20mA
VDD = 3.0V
–0.5
HPD input from 3.3V to 5.25V
Vin = 5.25V, Ii = 100uA, VDD
= 3.3V
1.8
Typ(2)
VDD/2
–1.6V
–0.7
11
7
12
7
3.3
5
2.2
5
Max Units
0.75
VDD
VDD/2+
300mV
0.6
–1.8
–1.5
±5
±5
20
V
µA
Ohm
Ohm
Ohm
Ohm
5.5 V
5.5 V
3.6 V
V
2.5 V
V
VPASS
(SCL_X)
Switch output voltage tolerance input
Vin = 5.25V, Ii = 100uA, VDD
= 3.3V
1.8
2.2
2.5
V
All trademarks are property of their respective owners.
15-0175
5
www.pericom.com 12/03/15

5 Page

PI3WVR12612 arduino
PI3W VR12612
HDMI 2.0, DisplayPort 1.2 Video Switch
Test Circuit for Electrical Characteristics(1-5)
VDD
0V/3V
3V/0V
PA
D.U.T COM
PB
SEL
Pulse
Generator
4pF
CL
200-ohm
Notes:
1. CL = Load capacitance: includes jig and probe capacitance.
2. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator
3. All input impulses are supplied by generators having the following characteristics: PRR ≤ MHz, ZO = 50Ω, tR ≤ 2.5ns, tF ≤ 2.5ns.
4. The outputs are measured one at a time with one transition per measurement.
Switching Waveforms
SEL
Tsw b-a
Output 1
50%
Output 2
50%
Tsw a-b
50%
50%
VDD
0V
VOH
VOL
VOH
VOL
Voltage Waveforms Enable and Disable Times
Test Condition
Output 1 Test Conditon
PA = Low
PB = High
Output 2 Test Conditon
PA = High
PB = Low
All trademarks are property of their respective owners.
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