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PDF bq24742 Data sheet ( Hoja de datos )

Número de pieza bq24742
Descripción Li-Ion or Li-Polymer Battery Charger
Fabricantes Texas 
Logotipo Texas Logotipo



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bq24741, bq24742
www.ti.com
SLUS875B – MARCH 2009 – REVISED OCTOBER 2009
Li-Ion or Li-Polymer Battery Charger with Low Iq and Accurate Trickle Charge
Check for Samples :bq24741 bq24742
FEATURES
1
• NMOS-NMOS Synchronous Buck Converter
• Resistor-Programmable Switching Frequency
between 300 kHz and 800 kHz
• 9 V-24 V Input Voltage Operation Range
• Support Two to Four Cells
• Analog Inputs with Ratiometric Programming
via Resistors or DAC/GPIO
– Charge Voltage (4-4.512 V/cell)
– Charge Current (up to 10 A)
– Adapter Current Limit for DPM
• High-Accuracy Voltage and Current Regulation
– ±0.5% Charge Voltage Accuracy
– ±3% Charge Current Accuracy
– ±3% Adapter Current Accuracy
– ±2% Input Current Sense Amp Accuracy
• 150 mA Trickle-charge Current with ±33%
Accuracy Down to Zero Battery Voltage
• Safety Protection
– Input Overvoltage Protection
– Battery Overvoltage Protection
– Charger Overcurrent Protection
– Thermal Shutdown Protection
– FET/Inductor/Battery Short Protection
• Status and Monitoring Outputs
– Adapter Present Indicator
– Programmable Input Power Detect with
Adjustable Threshold
– Dynamic Power Management (DPM) with
Status Indicator
– Current Drawn from Input Source
• Charge Enable Pin
• Internal Soft-Start and Loop Compensation
• 25 ns Minimum Driver Dead-Time and 99.5%
Maximum Effective Duty Cycle
• 28-pin, 5x5-mm2 QFN package
• Energy Star Low Quiescent Current Iq
– < 10 μA Off-State Battery Discharge Current
– < 1.5 mA Off-State Input Quiescent Current
APPLICATIONS
• Notebook and Ultra-Mobile PC
• Portable Data Capture Terminals
• Portable Printers
• Medical Diagnostics Equipment
• Battery Bay Chargers
• Battery Back-up Systems
DESCRIPTION
The bq24741/2 is a high-efficiency, synchronous
battery charger with integrated compensation,
offering low component count for space-constrained
Li-ion or Li-polymer battery charging applications.
Ratiometric charge current and voltage programming
allows high regulation accuracies, and can be either
hardwired with resistors or programmed by the
system power-management microcontroller using a
DAC or GPIOs.
The bq24741/2 charges two, three, or four series Li+
cells, supporting up to 10 A of charge current, and is
available in a 28-pin, 5x5-mm2 thin QFN package.
Text for space
Text for space
CE 1
ACN 2
ACP 3
LPMOD 4
ACDET 5
ACSET 6
LPREF 7
28 27 26 25 24 23 22
bq24741/2
QFN-28
TOP VIEW
21 DPMDET
20 CELLS
19 CSP
18 CSN
17 BAT
16 ISET
15 IADAPT
8 9 10 11 12 13 14
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2009, Texas Instruments Incorporated

1 page




bq24742 pdf
www.ti.com
bq24741, bq24742
SLUS875B – MARCH 2009 – REVISED OCTOBER 2009
Table 1. Pin Functions – 28-Pin QFN (continued)
PIN
NAME
NO.
DPMDET 21
PGND
LODRV
REGN
22
23
24
SW
HIDRV
BTST
25
26
27
PVCC
28
PowerPad
DESCRIPTION
Dynamic power management (DPM) input current loop active, open-drain output status. Logic low (LO) indicates input
current is being limited by reducing the charge current. Connect 10-kohm pull-up resistor from DPMDET pin to VREF or
a different pull-up supply rail.
Power ground. Ground connection for high-current power converter node. On PCB layout, connect directly to source of
low-side power MOSFET, to ground connection of in put and output capacitors of the charger. Only connect to AGND
through the PowerPad underneath the IC.
PWM low side driver output. Connect to the gate of the low–side power MOSFET with a short and wide trace.
PWM low side driver positive supply output. Connect a 1 μF ceramic capacitor from REGN to PGND pin, close to the
IC. Use for low side driver and high-side driver bootstrap voltage by connecting a small signal Schottky diode from
REGN to BTST. REGN is disabled when CE is LOW.
PWM high side driver negative supply. Connect to the Phase switching node (junction of the low-side power MOSFET
drain, high-side power MOSFET source, and output inductor). Connect the 0.1 μF bootstrap capacitor from SW to
BTST.
PWM high side driver output. Connect to the gate of the high-side power MOSFET with a short trace.
PWM high side driver positive supply. Connect a 0.1 μF bootstrap ceramic capacitor from BTST to SW. Connect a
bootstrap Schottky diode from REGN to BTST. A optional 2.0- 5.1bootstrap resistor can be inserted between the
BTST pin and the common point of the bootstrap capacitor and bootstrap diode, thus dampening the SW node voltage
ring and spike.
IC power positive supply. Connect to the adapter input through a schottky diode. Place a 0.1 uF ceramic capacitor from
PVCC to PGND pin close to the IC.
Exposed pad beneath the IC. AGND and PGND star-connected only at the PowerPad plane. Always solder PowerPad
to the board, and have vias on the PowerPad plane connecting to AGND and PGND planes. It also serves as a thermal
pad to dissipate the heat.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)(1) (2)
Voltage range
Maximum difference voltage
Junction temperature range
Storage temperature range
PVCC, ACP, ACN, CSP, CSN, BAT
SW
REGN, LODRV, VADJ, ACSET, ISET, ACDET, FSET, IADAPT, LPMOD,
LPREF, CE, CELLS, EXTPWR, DPMDET, TRICKLE
VDAC, VREF
BTST, HIDRV with respect to AGND and PGND
AGND, PGND
ACP–ACN, CSP–CSN
VALUE
–0.3 to 30
–1 to 30
–0.3 to 7
–0.3 to 3.6
–0.3 to 36
–1 to 1
-0.5 to 0.5
–40 to 155
–55 to 155
UNIT
V
°C
°C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to GND if not specified. Currents are positive into, negative out of the specified terminal. Consult Packaging
Section of the data book for thermal limitations and considerations of packages.
Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s) :bq24741 bq24742
Submit Documentation Feedback
5

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bq24742 arduino
www.ti.com
VREF LOAD AND LINE REGULATION
vs
Load Current
0.50
0.40
0.30
0.20
0.10
PVCC = 10 V
0
-0.10
-0.20
0
PVCC = 20 V
10 20 30 40
VREF - Load Current - mA
Figure 3.
50
BAT VOLTAGE
vs
VADJ/VDAC RATIO
13.6
13.4
13.2
3-Cell
13
12.8
12.6
12.4
12.2
12
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
VADJ/VDAC Ratio
Figure 5.
1
CHARGE CURRENT
vs
ISET/VDAC
5
4.5
3-Cell
4
3.5
3
2.5
2
1.5
1
0.5
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
ACSET/VDAC Ratio
Figure 7.
1
bq24741, bq24742
SLUS875B – MARCH 2009 – REVISED OCTOBER 2009
REGN LOAD AND LINE REGULATION
vs
LOAD CURRENT
0
-0.50
-1
-1.50
-2
PVCC = 10 V
-2.50
-3
0
PVCC = 20 V
10 20 30 40 50 60 70
REGN - Load Current - mA
Figure 4.
80
BAT VOLTAGE REGULATION ACCURACY
vs
SETPOINT
0.06
0.05
0.04
0.03
0.02
0.01
0
-0.01
-0.02
12 12.2 12.4 12.6 12.8 13 13.2 13.4 13.6
VBAT_reg Setpoint (V)
Figure 6.
CHARGE CURRENT REGULATION ACCURACY
vs
V(CSP-CSN) SETPOINT
25
20
15
10
5
0
0 10 20 30 40 50 60 70 80 90 100
ICHG_reg Setpoint (mV)
Figure 8.
Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s) :bq24741 bq24742
Submit Documentation Feedback
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