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PDF UPD720400 Data sheet ( Hoja de datos )
| Número de pieza | UPD720400 | |
| Descripción | PCI Express - PCI/PCI-X Bridge | |
| Fabricantes | NEC | |
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DATA SHEET
MOS INTEGRATED CIRCUIT
µPD720400
PCI Express – PCI/PCI-X Bridge
(Ver 1.08)
µPD720400 is a PCI Express to PCI/PCI-X Bridge chip that supports the PCI Express Base Specification
Revision1.1 and PCI Express to PCI/PCI-X Bridge Specification Revision1.0. µPD720400 contains a PCI
Express Serdes circuit with an x8 Lane structure as a primary interface and two 64bits PCI/PCI-X bus
interface circuits.
Part number
µPD720400FF-RN1
µPD720400FF-RN1-A
µPD720400AFF-RN1
µPD720400AFF-RN1-A
µPD720400CFF-RN1
µPD720400CFF-RN1-A
Ordering Information
Package
Chip Version
648-pin Tape BGA (35x35) Ver.4.1
648-pin Tape BGA (35x35) Ver.4.1
648-pin Tape BGA (35x35) Ver.4.3
648-pin Tape BGA (35x35) Ver.4.3
648-pin Tape BGA (35x35) Ver.4.5
648-pin Tape BGA (35x35) Ver.4.5
Remark
Lead-free product
Lead-free product
Lead-free product
The information in this document is subject to change without notice.
NEC ELECTRONICS CONFIDENTIAL
June 02, 2006
1
NEC Electronics Inc 2003- 2006
1 page  
µPD720400
1. Features
• PCI Express Interface
- Compliant with The PCI Express Base Specification Revision 1.1
- Contains x8Lane 2.5Gbps full-duplex serial interface PCI Express Serdes
- Supports 1 Virtual Channel
- Supports 256 byte Max Payload Size
- Supports PCI Express Advanced Error Logging
- Supports Data Poisoning
- Supports ECRC checking and generation
• PCI/PCI-X Interface
- Compliant with the PCI Local Bus Specification Revision 3.0, PCI-X Protocol/Electrical and
Mechanical Addendum to the PCI Local Bus Specification Revision 2.0a
- Compliant with PCI-PCI Bridge Specification Revision 1.2 and PCI Express to PCI/PCI-X Bridge
Specification Revision 1.0
- Supports two PCI/PCI-X bus interfaces
- Supports 133MHz Single Data Rate 64 bit PCI-X mode (PCI-X Mode1) and 66MHz 64 bit PCI mode
- Supports 3.3V signaling ( not supports 5V tolerant signaling)
- Supports LOCK# transaction
- Contains arbitration fucntions for up to 4 external agents at each PCI/PCI-X port
- Supports PCI bus parking function
• SMBus Interface
- Conforms to SMBus Specification Version 2.0
- SMBus Slave interface
- Supports Read/Write access to internal configuration and memory mapped registers
- Supports Packet Error Checking (PEC)
- Supports SMBus Alert
• EEPROM Interface
- Parameter loading from Serial EEPROM (set in Configuration registers)
• Hot Plug Controller
- Compliant with PCI SHPC and Subsystem Specification Revision 1.0
- Supports Hot Plug Controller functions at each PCI/PCI-X port
- Supports Hot Plug Slot controls in both parellel and serial modes
- Supports interface for ACPI Hot Plug handling as well as OSHP (Operating System Hot Plug)
• Power Management
- Compliant with to PCI Bus Power Management Interface Specification Revision1.1
- Supports D0, D1 and D3 power states
The information in this document is subject to change without notice.
NEC ELECTRONICS CONFIDENTIAL
June 02, 2006
5
NEC Electronics Inc 2003- 2006
5 Page 
µPD720400
3.1.
Pin List (numerical order)
PKG
A01
A02
A03
A04
A05
A06
A07
A08
A09
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
B01
B02
B03
B04
B05
B06
B07
B08
B09
B10
B11
B12
B13
B14
B15
B16
B17
NAME
N.C.
N.C.
N.C.
VDD3.3
SB_CLKM
SB_AD13
SB_AD15
SB_SERRB
SB_PCIXCAP_I
SB_PCIXCAP_P
SB_TRDYB
SB_FRAMEB
SB_AD17
SB_AD21
SB_CBE3B
SB_AD26
SB_AD29
SA_AD29
SA_AD26
SA_CBE3B
SA_AD21
SA_AD18
SA_FRAMEB
SA_DEVSELB
SA_PCIXCAP_P
SA_PCIXCAP_I
SA_AD14
SA_AD12
SA_AD11
SA_CLKM
EPR_EN
VDD3.3
N.C.
VSS
N.C.
N.C.
N.C.
SB_SLOTM2
CTRI
SB_AD14
SB_PAR
SB_LOCKB
SB_STOPB
SB_IRDYB
SB_CBE2B
SB_AD18
SB_AD22
SB_AD24
SB_AD27
SB_AD30
PKG
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
C01
C02
C03
C04
C05
C06
C07
C08
C09
C10
C11
C12
C13
C14
C15
C16
C17
C18
C19
C20
C21
C22
C23
C24
C25
C26
C27
C28
C29
C30
C31
C32
C33
D01
NAME
SA_AD30
SA_AD27
SA_AD24
SA_AD22
SA_AD19
SA_CBE2B
SA_TRDYB
SA_LOCKB
SA_SERRB
SA_AD15
SA_PAR
SB_HPCM1
SA_HPCM0
VDD3.3
N.C.
N.C.
SMB_ADD0
ROSC_N5
N.C.
N.C.
VDD3.3
SB_SLOTM1
N.C.
SB_CBE1B
N.C.
SB_DEVSELB
N.C.
SB_AD16
SB_AD19
SB_AD23
SB_AD25
SB_AD28
SB_AD31
SA_AD31
SA_AD28
SA_AD25
SA_AD23
SA_AD20
SA_AD16
SA_IRDYB
SA_STOPB
SA_PERRB
SA_CBE1B
SA_AD13
SA_HPCM1
N.C.
N.C.
N.C.
N.C.
DBT_MODE
PKG
D02
D03
D04
D05
D06
D07
D08
D09
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
E01
E02
E03
E04
E05
E06
E07
E08
E09
E10
E11
E12
E13
E14
E15
E16
E17
E18
(1/4)
NAME
SMB_ADD1
N.C.
N.C.
N.C.
SD_TESTEN
N.C.
SB_PERRB
VDD1.5
N.C.
VDD1.5
N.C.
SB_AD20
N.C.
VDD1.5
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
SA_AD17
VDD1.5
N.C.
N.C.
N.C.
SB_HPCM0
N.C.
N.C.
ROSC_N9
SA_SLOTM2
TMC1
SB_AD12
N.C.
SMB_ADD2
N.C.
N.C.
N.C.
SB_SLOTM0
VSS
N.C.
VSS
VSS
VSS
N.C.
VSS
N.C.
VSS
VSS
VSS
PKG
E19
E20
E21
E22
E23
E24
E25
E26
E27
E28
E29
E30
E31
E32
E33
F01
F02
F03
F04
F05
F06
F07
F08
F09
F10
F11
F12
F13
F14
F15
F16
F17
F18
F19
F20
F21
F22
F23
F24
F25
F26
F27
F28
F29
F30
F31
F32
F33
G01
G02
NAME
VSS
VSS
VSS
VSS
N.C.
VSS
N.C.
VSS
N.C.
N.C.
N.C.
N.C.
SA_SLOTM1
TMC2
SA_AD10
SB_AD10
SB_AD11
SMB_ADD3
SMB_ADD4
N.C.
N.C.
N.C.
N.C.
VDD3.3
VDD3.3
VDD3.3
VDD3.3
VDD1.5
VDD3.3
VDD3.3
VDD3.3
VDD3.3
VDD1.5
VDD3.3
VDD1.5
VDD3.3
VDD1.5
VDD3.3
VDD3.3
VDD3.3
VDD1.5
VDD3.3
N.C.
N.C.
SA_SLOTM0
DC_TEST_MODE
SA_M66EN_O
SA_M66EN
SB_CBE0B
SB_AD9
The information in this document is subject to change without notice.
NEC ELECTRONICS CONFIDENTIAL
June 02, 2006
11
NEC Electronics Inc 2003- 2006
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet UPD720400.PDF ] | |
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