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PDF CHT-74132 Data sheet ( Hoja de datos )
| Número de pieza | CHT-74132 | |
| Descripción | Quad 2-Input NAND Schmitt Trigger | |
| Fabricantes | CISSOID | |
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The Leader in High Temperature
Semiconductor Solutions
CHT-74132 DATASHEET
Version: 3.7
8-Jul-14
(Last Modification Date)
High-Temperature, Quad 2-Input NAND Schmitt
Trigger
General Description
The CHT-74132 contains four independent
2-input NAND gates with Schmitt Trigger,
performing the Boolean function :
Y AB
The gate switches at different points for
positive and negative going signals. The
difference between the positive voltage VT+
and the negative voltage VT- is defined as
the hysteresis voltage VH
The CHT-74132 can operate with supply
voltages from 3.3 to 5V (±10%).
Features
Qualified from -55 to +225°C (Tj)
3.3 to 5V (±10%) supply voltages
Latchup-free at any supply and tem-
perature condition
Validated at 225°C for 30000 hours
(CDIL14) and 20000 hours (CSOIC16)
(and still on-going)
Available in CDIL14 and CSOIC 16
hermetic standard package
Applications
High temperature logic
Noise immunity function
Sensor interface
Signal processing/conditioning
Package and Pin Configuration
IN1 A 1
DIL14
14 VDD
IN1 B 2
13 IN4 A
OUT1 3
12 IN4 B
IN2 A 4
11 OUT4
IN2 B 5
10 IN3 A
OUT2 6
9 IN3 B
VSS 7
8 OUT3
Pin Symbol Description
1 IN1 A Input A of the NAND gate number 1
2 IN1 B Input B of the NAND gate number 1
3 OUT1 Output of the NAND gate number 1
4 IN2 A Input A of the NAND gate number 2
5 IN2 B Input B of the NAND gate number 2
6 OUT2 Output of the NAND gate number 2
7 VSS Circuit core ground terminal.
8 OUT3 Output of the NAND gate number 3
9 IN3 B Input B of the NAND gate number 3
10 IN3 A Input A of the NAND gate number 3
11 OUT4 Output of the NAND gate number 4
12 IN4 B Input B of the NAND gate number 4
13 IN4 A Input A of the NAND gate number 4
14 VDD
Circuit core power supply terminal.
PUBLIC
Doc. DS-080294 V3.7
WWW.CISSOID.COM
1 of 8
1 page  
8-Jul-14
(Last Modification Date)
CHT-74132 DATCAoSntHacEtE: TGonzalo Picún (+32-10-489214)Jul. 14
AC Electrical Characteristics
Unless otherwise stated: VDD=5V, Tj=25°C. Bold figures indicate values valid over the whole
temperature range (-55°C < Tj < +225°C).
Parameter
Condition
Temperature
Min Typ Max Units
Propagation delay
time from A or B to
Y1
tPHL
CL=50pF
Tj=-55°C
Tj=25°C
Tj=225°C
8.8
10.23
13.68
ns
Propagation delay
time from A or B to Y
tPLH
CL=50pF
Tj=-55°C
Tj=25°C
Tj=225°C
9.69
11.42
16.1
ns
Output transition time
High to Low
tTHL
CL=50pF
Tj=-55°C
Tj=25°C
Tj=225°C
8.17
11.47
16.39
ns
Output transition time
Low to High
tTLH
CL=50pF
Tj=-55°C
Tj=25°C
Tj=225°C
9.92
12
15.4
ns
1 Input A is 1% to 2% faster than input B.
PUBLIC
Doc. DS-080294 V3.7
WWW.CISSOID.COM
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| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet CHT-74132.PDF ] | |
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